SYNCHRONOUS BRAKING CONTROL METHOD AND SYSTEM FOR CARRIAGES OF TRAIN

    公开(公告)号:US20230311668A1

    公开(公告)日:2023-10-05

    申请号:US18022697

    申请日:2021-11-19

    CPC classification number: B60L7/26 B60T8/1705 B60L7/28 B60L2200/26 B60L2240/12

    Abstract: Proposed are a synchronous braking control method and system for carriages of a train, that are related to the field of electrical control. The synchronous braking control system includes a main controller, an electric energy conversion controller, and a shunt. During actual braking, the main controller obtains a real-time speed and real-time mass of the train, and determines whether the real-time speed is greater than a set speed. If not, the train is directly braked in a mechanical friction braking mode. If yes, an exciting current of a synchronous brake in each of the carriages of the train is adjusted by adjusting an input voltage of the synchronous brake, and unit braking forces of the carriages are controlled equal by using the adjusted exciting current, thereby realizing synchronous constant deceleration braking of the carriages.

    Switching mode power supply controller with high voltage startup circuits
    35.
    发明授权
    Switching mode power supply controller with high voltage startup circuits 有权
    具有高压启动电路的开关电源控制器

    公开(公告)号:US08045348B2

    公开(公告)日:2011-10-25

    申请号:US12421461

    申请日:2009-04-09

    CPC classification number: H02M1/36

    Abstract: A controller for a switching mode power supply includes two semiconductor chips. The first semiconductor chip has a high-voltage startup transistor coupled to a high voltage supply input terminal and configured to provide a charging current in a startup phase or protection mode of a switching mode power supply (SMPS) and to provide substantially no current in a normal operation phase of the SMPS. The second semiconductor chip has a control circuit for controlling the switching mode power supply. The second semiconductor chip also has first and second on-chip high-voltage resistors coupled to the high-voltage supply input terminal and the high-voltage startup transistor in the first semiconductor chip. The first and the second on-chip high-voltage resistors are configured to provide a voltage and a current related to a voltage at the high-voltage supply input terminal.

    Abstract translation: 开关电源的控制器包括两个半导体芯片。 第一半导体芯片具有耦合到高电压电源输入端的高电压启动晶体管,并被配置为在开关模式电源(SMPS)的启动阶段或保护模式下提供充电电流,并且基本上不提供电流 正常运行阶段的SMPS。 第二半导体芯片具有用于控制开关模式电源的控制电路。 第二半导体芯片还具有耦合到第一半导体芯片中的高压电源输入端子和高压启动晶体管的第一和第二片上高压电阻器。 第一和第二片上高压电阻器被配置为提供与高压电源输入端子处的电压相关的电压和电流。

    DOCKING PLATFORM FOR DEVELOPING PORTABLE PACKET PROCESSING APPLICATIONS IN A NETWORK PROCESSOR
    37.
    发明申请
    DOCKING PLATFORM FOR DEVELOPING PORTABLE PACKET PROCESSING APPLICATIONS IN A NETWORK PROCESSOR 失效
    用于在网络处理器中开发便携式分组处理应用的锁定平台

    公开(公告)号:US20080270627A1

    公开(公告)日:2008-10-30

    申请号:US12165774

    申请日:2008-07-01

    CPC classification number: H04L69/12 H04L69/32

    Abstract: An apparatus for developing portable packet processing applications on network processors includes a docking platform which provides a common interface for individual packet processing applications to be plugged into the network processing environment. Each application interacts with the docking platform through the common interfaces provided by the latter. The docking platform interacts with the other modules inside the system to accomplish the requests from the application. In this manner, the applications become “shielded” from the implementation details of the underlying hardware. The applications need not change when the network processor hardware features are changed. It therefore provides a universal packet processing programming environment in which applications can execute in a portable and flexible manner in various hardware architectures.

    Abstract translation: 用于在网络处理器上开发便携式分组处理应用的装置包括对接平台,其提供用于插入到网络处理环境中的各个分组处理应用的公共接口。 每个应用程序通过后者提供的通用接口与对接平台交互。 对接平台与系统内的其他模块进行交互,以完成应用程序的请求。 以这种方式,应用程序就成为“屏蔽”了底层硬件的实现细节。 当网络处理器硬件特性改变时,应用程序不需要改变。 因此,它提供了通用分组处理编程环境,其中应用可以在各种硬件架构中以便携和灵活的方式执行。

    Docking platform for developing portable packet processing applications in a network processor
    38.
    发明申请
    Docking platform for developing portable packet processing applications in a network processor 失效
    用于在网络处理器中开发便携式数据包处理应用的对接平台

    公开(公告)号:US20050160182A1

    公开(公告)日:2005-07-21

    申请号:US10760902

    申请日:2004-01-20

    CPC classification number: H04L69/12 H04L69/32

    Abstract: A method and apparatus for developing portable packet processing applications on network processors includes a docking platform which provides a common interface for individual packet processing applications to be plugged into the network processing environment. Each application interacts with the docking platform through the common interfaces provided by the latter. The docking platform interacts with the other modules inside the system to accomplish the requests from the application. In this manner, the applications become “shielded” from the implementation details of the underlying hardware. The applications need not change when the network processor hardware features are changed. It therefore provides a universal packet processing programming environment in which applications can execute in a portable and flexible manner in various hardware architectures.

    Abstract translation: 用于在网络处理器上开发便携式分组处理应用的方法和装置包括对接平台,其提供用于插入到网络处理环境中的各个分组处理应用的公共接口。 每个应用程序通过后者提供的通用接口与对接平台交互。 对接平台与系统内的其他模块进行交互,以完成应用程序的请求。 以这种方式,应用程序就成为“屏蔽”了底层硬件的实现细节。 当网络处理器硬件特性改变时,应用程序不需要改变。 因此,它提供了通用分组处理编程环境,其中应用可以在各种硬件架构中以便携和灵活的方式执行。

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