公开(公告)号：US08475653B2

公开(公告)日：2013-07-02

申请号：US12834372

申请日：2010-07-12

Applicant: Kwang-Soo Kim ,  I-Tae Kim ,  Kwang-Ho Ahn ,  Jun-Ho Park ,  Yu-Jin Lee

Inventor： Kwang-Soo Kim ,  I-Tae Kim ,  Kwang-Ho Ahn ,  Jun-Ho Park ,  Yu-Jin Lee

IPC: C02F3/06 ,  C02F3/10

CPC classification number: C02F3/101 ,  Y02W10/15

Abstract: A water treatment apparatus includes a plurality of meshed tubes made of synthetic yarn and provided with cilia; a plurality of tube stack cages containing the meshed tubes; and an aeration diffuser positioned between the tube stack cages and configured to provide air so that to-be-treated influent water moves to the tube stack cages. The hollow interior of the filter media, i.e. meshed tubes, enables water to move in any direction, and the high porosity maximizes the area for filtering of suspended solids and attachment of microorganisms. The resulting efficiency of removal of suspended solids and soluble organic material is far greater than conventional methods. Arrangement of diffusers in the middle of the reaction tank and between the tube stack cages and aeration by them result in perfect mixing in the reaction tank. The load of suspended solids and soluble organic materials is evenly distributed over the entire filer media.

Abstract translation: 水处理装置包括由合成纱线制成并具有纤维的多个网眼管; 包含所述网状管的多个管堆笼; 以及曝气扩散器，其位于所述管堆叠笼之间并且构造成提供空气，使得待处理的流入水移动到所述管堆笼笼。 过滤介质的中空内部，即网状管，使得水能够在任何方向移动，并且高孔隙率使用于过滤悬浮固体和附着微生物的面积最大化。 所得到的悬浮固体和可溶性有机材料的去除效率远远大于常规方法。 在反应槽中间和管堆笼之间以及它们通气之间的扩散器的布置导致反应罐中的完美混合。 悬浮固体和可溶性有机材料的负载均匀分布在整个过滤介质上。

公开(公告)号：US08242574B2

公开(公告)日：2012-08-14

申请号：US12833568

申请日：2010-07-09

Applicant: Yu-Jin Lee

Inventor： Yu-Jin Lee

IPC: H01L29/06 ,  H01L21/762

CPC classification number: H01L21/76232

Abstract: A method for forming an isolation layer of a semiconductor device includes forming a trench in a substrate, forming a high-density plasma (HDP) oxide layer filling a portion of the trench, forming a spin-on-dielectric (SOD) oxide layer having a certain height over the HDP oxide layer, performing a thermal treatment, and forming an enhanced high-aspect-ratio process (eHARP) oxide layer filling another portion of the trench over the SOD oxide layer.

Abstract translation: 一种用于形成半导体器件的隔离层的方法包括在衬底中形成沟槽，形成填充沟槽的一部分的高密度等离子体（HDP）氧化物层，形成具有 在HDP氧化物层上的一定高度，进行热处理，以及形成在SOD氧化物层上填充沟槽的另一部分的增强的高纵横比工艺（eHARP）氧化物层。

公开(公告)号：US08212232B2

公开(公告)日：2012-07-03

申请号：US12697507

申请日：2010-02-01

Applicant: Yu-Jin Lee

Inventor： Yu-Jin Lee

IPC: H01L47/00

CPC classification number: H01L45/1233 ,  H01L45/08 ,  H01L45/146 ,  H01L45/1641

Abstract: A resistance changing device includes a resistive layer of a hetero structure interposed between a lower electrode and an upper electrode, and including a plurality of resistive material layers, each having a different resistivity, stacked therein, wherein resistivities of the resistive material layers decrease from the lower electrode toward the upper electrode. Since the resistive layer has a hetero structure in which a plurality of resistive material layers, each having a different resistivity, are stacked in such a manner that the resistivity decreases as it goes from the lower electrode to the upper electrode, it is possible to improve the distributions of the set/reset voltage and the set/reset current, while reducing a reset current of a resistance changing device at the same time.

Abstract translation: 电阻改变装置包括插入在下电极和上电极之间的异质结构的电阻层，并且包括堆叠在其中的电阻率不同的多个电阻材料层，其中电阻材料层的电阻率从 下电极朝向上电极。 由于电阻层具有异质结构，其中，具有不同电阻率的多个电阻材料层以这样的方式堆叠，使得电阻随着从下电极到上电极的降低而降低，可以提高 设置/复位电压和设置/复位电流的分布，同时减少电阻变化器件的复位电流。

公开(公告)号：US08148708B2

公开(公告)日：2012-04-03

申请号：US12344443

申请日：2008-12-26

Applicant: Yun-Taek Hwang ,  Yu-Jin Lee

Inventor： Yun-Taek Hwang ,  Yu-Jin Lee

IPC: H01L45/00

CPC classification number: H01L27/24 ,  Y10S438/903 ,  Y10S977/762 ,  Y10S977/843 ,  Y10S977/943

Abstract: A resistive memory device includes a first conductive line on a substrate, a vertical selection diode comprising a nanowire or a nanotube and being arranged over the first conductive line, a resistive element including a resistive layer arranged over the vertical selection diode; and a second conductive line arranged over the resistive element.

Abstract translation: 电阻式存储器件包括衬底上的第一导电线，包括纳米线或纳米管并且布置在第一导线上的垂直选择二极管，包括布置在垂直选择二极管上的电阻层的电阻元件; 以及布置在所述电阻元件上的第二导线。

公开(公告)号：US20110175051A1

公开(公告)日：2011-07-21

申请号：US12979922

申请日：2010-12-28

Applicant: Seok-Pyo SONG ,  Yu-Jin LEE

Inventor： Seok-Pyo SONG ,  Yu-Jin LEE

IPC: H01L47/00 ,  H01L21/76

CPC classification number: H01L45/1273 ,  G11C2213/52 ,  H01L27/2409 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/1253 ,  H01L45/16

Abstract: A resistive memory device includes a lower electrode formed on a substrate, a resistive layer formed on the lower electrode, and an upper electrode on the resistive layer, wherein a lower portion of the upper electrode is narrower than an upper portion of the upper electrode.

Abstract translation: 电阻式存储器件包括形成在基板上的下电极，形成在下电极上的电阻层和电阻层上的上电极，其中上电极的下部比上电极的上部窄。

公开(公告)号：US20110049669A1

公开(公告)日：2011-03-03

申请号：US12833568

申请日：2010-07-09

Applicant: Yu-Jin Lee

Inventor： Yu-Jin Lee

IPC: H01L29/06 ,  H01L21/762

CPC classification number: H01L21/76232

Abstract: A method for forming an isolation layer of a semiconductor device includes forming a trench in a substrate, forming a high-density plasma (HDP) oxide layer filling a portion of the trench, forming a spin-on-dielectric (SOD) oxide layer having a certain height over the HDP oxide layer, performing a thermal treatment, and forming an enhanced high-aspect-ratio process (eHARP) oxide layer filling another portion of the trench over the SOD oxide layer.

Abstract translation: 一种用于形成半导体器件的隔离层的方法包括在衬底中形成沟槽，形成填充沟槽的一部分的高密度等离子体（HDP）氧化物层，形成具有 在HDP氧化物层上的一定高度，进行热处理，以及形成在SOD氧化物层上填充沟槽的另一部分的增强的高纵横比工艺（eHARP）氧化物层。

公开(公告)号：US20100124916A1

公开(公告)日：2010-05-20

申请号：US12622964

申请日：2009-11-20

Applicant: Hyun-Soo Kim ,  Young-Chul Lee ,  Yu-Jin Lee

Inventor： Hyun-Soo Kim ,  Young-Chul Lee ,  Yu-Jin Lee

IPC: H04M3/00

CPC classification number: H04M3/436 ,  H04M2201/12 ,  H04M2201/18

Abstract: An apparatus and a method for managing a spam number in a mobile communication terminal are provided. The method includes determining a spam index for each of at least one phone number using a reception record by phone number, and determining spam number registration or non-registration for each phone number depending on the spam index.

Abstract translation: 提供了一种用于在移动通信终端中管理垃圾信息数量的装置和方法。 该方法包括使用电话号码的接收记录来确定每个至少一个电话号码的垃圾邮件索引，以及根据垃圾邮件索引确定每个电话号码的垃圾信息号码注册或不注册。

公开(公告)号：US20100117041A1

公开(公告)日：2010-05-13

申请号：US12344443

申请日：2008-12-26

Applicant: Yun-Taek HWANG ,  Yu-Jin LEE

Inventor： Yun-Taek HWANG ,  Yu-Jin LEE

IPC: H01L47/00 ,  H01L21/00

CPC classification number: H01L27/24 ,  Y10S438/903 ,  Y10S977/762 ,  Y10S977/843 ,  Y10S977/943

Abstract: A resistive memory device includes a first conductive line on a substrate, a vertical selection diode comprising a nanowire or a nanotube and being arranged over the first conductive line, a resistive element including a resistive layer arranged over the vertical selection diode; and a second conductive line arranged over the resistive element.

Abstract translation: 电阻式存储器件包括衬底上的第一导电线，包括纳米线或纳米管并且布置在第一导线上的垂直选择二极管，包括布置在垂直选择二极管上的电阻层的电阻元件; 以及布置在所述电阻元件上的第二导线。

公开(公告)号：US07566645B2

公开(公告)日：2009-07-28

申请号：US11819858

申请日：2007-06-29

Applicant: Yu Jin Lee

Inventor： Yu Jin Lee

IPC: H01L21/3205 ,  H01L29/76

CPC classification number: H01L29/4236 ,  H01L21/76232 ,  H01L21/763 ,  H01L21/823807 ,  H01L21/823828 ,  H01L27/10876 ,  H01L29/66621

Abstract: A method for fabricating a semiconductor device is provided. In the method, a bulb type recess is formed on a semiconductor substrate in an active region. A gate insulating film is formed over the semiconductor substrate and on a surface of the recess. A first polysilicon layer is formed over the gate insulating film. A silicon-on-dielectric (“SOD”) barrier film is formed on the first polysilicon layer at a lower part of the recess. A second polysilicon layer is formed over the semiconductor substrate and filling the recess. Impurity ions are injected into the second polysilicon layer. An annealing process is performed on the semiconductor substrate. A metal layer and a gate hard mask layer is formed and patterned over the second polysilicon layer to form a gate including the SOD barrier film.

Abstract translation: 提供一种制造半导体器件的方法。 在该方法中，在活性区域中的半导体衬底上形成灯泡型凹部。 在半导体衬底上和凹部的表面上形成栅极绝缘膜。 在栅绝缘膜上形成第一多晶硅层。 在凹部的下部的第一多晶硅层上形成有硅上电介质（“SOD”）阻挡膜。 第二多晶硅层形成在半导体衬底上并填充凹槽。 杂质离子注入第二多晶硅层。 对半导体基板进行退火处理。 在第二多晶硅层上形成并图案化金属层和栅极硬掩模层，以形成包括SOD阻挡膜的栅极。