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    FLOW RATE RATIO CONTROL DEVICE
    31.
    发明申请
    FLOW RATE RATIO CONTROL DEVICE 有权
    流量比率控制装置

    公开(公告)号：US20100030390A1

    公开(公告)日：2010-02-04

    申请号：US12518875

    申请日：2007-12-11

    申请人： Yuji Yamaguchi ,  Akihiro Matsumoto ,  Yutaka Yoneda

    发明人： Yuji Yamaguchi ,  Akihiro Matsumoto ,  Yutaka Yoneda

    IPC分类号： G05D11/13 ,  G05D7/06

    CPC分类号： G05D7/0664 ,  G05D11/132 ,  Y10T137/0363 ,  Y10T137/7759 ,  Y10T137/7761 ,  Y10T137/87772

    摘要： A flow rate ratio control device having: a main channel (RM); branch channels (R1, R2) branching from the end of the main channel (RM); control valves (31, 32) respectively provided in the branch channels (R1, R2); flow rate measurement means for measuring the flow rate of the main channel (RM) and the flow rate of each of the branch channels (R1, R2); a valve control section (5) for controlling the a control valve (31) provided in one branch channel (R2) so that the pressure on the upstream side of the control valve (31) is a given target pressure and, only when the upstream-side pressure is near or not less than the target pressure, starting control of the other control valve (32) so that the flow rate ratios of the branch channels (R1, R2) are predetermined ratios; and a target pressure setting section (6) for setting the target pressure such that the smaller the flow volume is in the main channel (RM), the lower is the target pressure.

    摘要翻译： 一种流量比控制装置，具有：主通道（RM）; 从主通道（RM）的端部分支的分支通道（R1，R2）; 分别设置在分支通道（R1，R2）中的控制阀（31,32） 用于测量主通道（RM）的流量和每个分支通道（R1，R2）的流量的流量测量装置; 用于控制设置在一个分支通道（R2）中的控制阀（31）的阀控制部分（5），使得控制阀（31）上游侧的压力是给定的目标压力，并且仅当上游 侧压力接近或不小于目标压力，开始控制另一个控制阀（32），使得分支通道（R1，R2）的流量比为预定比率; 以及用于设定目标压力使得流量在主通道（RM）中越小，目标压力越低的目标压力设定部分（6）。

    Video signal processor
    32.
    发明申请
    Video signal processor 失效

    公开(公告)号：US20060158565A1

    公开(公告)日：2006-07-20

    申请号：US11305156

    申请日：2005-12-19

    申请人： Hirotoshi Miyazawa ,  Akihiro Matsumoto

    发明人： Hirotoshi Miyazawa ,  Akihiro Matsumoto

    IPC分类号： H04N9/73

    CPC分类号： H04N9/68

    摘要： In the event that the maximum Imax of R, G, B color signals is detected and the maximum value Imax is equal to or higher than the suppression start level Vcs which is lower than a predetermined level to be restricted, a suppression gain is generated in accordance with the value of this maximum Imax, and by this suppression gain Gc, R, G, B color signals to be inputted are simultaneously suppressed. By this, color signals can be restricted to the predetermined range and outputted without impairing white balance.

    Semiconductor memory device and control method for the same
    34.
    发明授权
    Semiconductor memory device and control method for the same 失效
    半导体存储器件及其控制方法相同

    公开(公告)号：US5530670A

    公开(公告)日：1996-06-25

    申请号：US318331

    申请日：1994-10-05

    申请人： Akihiro Matsumoto

    发明人： Akihiro Matsumoto

    IPC分类号： G11C11/401 ,  G11C7/10 ,  G11C7/00

    CPC分类号： G11C7/103

    摘要： In a semiconductor memory device of a multiple-output port type including a plurality of read buses, data in a write bus are sequentially written into write registers, and the thus written data are transferred to the even-numbered bit-line pairs of a memory cell array section, and then data are again written into the write registers, after which the thus written data are transferred to the odd-numbered bit-line pairs. Then, the data in the even-numbered bit-line pairs are transferred to read A registers which correspond to one of the read buses, and the thus transferred data are sequentially read into the read bus, and thereafter, the data in the odd-numbered bit-line pairs are transferred to the read A registers and the thus transferred data are sequentially read into the read bus. Thus, the total number of read registers corresponding to all the read buses is made equal to that of the bit-line pairs, and is accordingly smaller as compared with a conventional semiconductor memory device. This allows all the read registers to be aligned along the same lane, so that the entire memory chip can be made smaller in size.

    摘要翻译： 在包括多个读总线的多输出端口类型的半导体存储器件中，写总线中的数据被顺序地写入写入寄存器，并且这样写入的数据被传送到存储器的偶数位线对 单元阵列部分，然后将数据再次写入写入寄存器，之后将这样写入的数据传送到奇数位线对。 然后，偶数位线对中的数据被传送到对应于读总线之一的读A寄存器，并将所传送的数据顺序地读入读总线，之后， 编号的位线对被传送到读取的A寄存器，并且这样传送的数据被顺序地读入读出总线。 因此，与所有读总线相对应的读寄存器的总数等于位线对的总数，并且与常规半导体存储器件相比较小。 这允许所有读取寄存器沿着相同的通道对齐，使得可以使整个存储器芯片的尺寸更小。

    Semiconductor memory having multiple data I/O with bit aligned access function
    35.
    发明授权
    Semiconductor memory having multiple data I/O with bit aligned access function 失效
    半导体存储器具有具有位对准访问功能的多个数据I / O

    公开(公告)号：US5357477A

    公开(公告)日：1994-10-18

    申请号：US884449

    申请日：1992-05-18

    申请人： Akihiro Matsumoto ,  Hideo Nishimatsu

    发明人： Akihiro Matsumoto ,  Hideo Nishimatsu

    IPC分类号： G11C7/10 ,  G11C8/00

    CPC分类号： G11C7/1006

    摘要： A memory includes a memory cell array unit, a plurality of memory cell bit lines connected to the memory cell array unit, a plurality of column selecting gates, and a plurality of sub data lines connected to the memory cell bit lines via the column selecting gates. A column selector serves to select and make conductive members of the column selecting gates so that data can be transmitted between successive members of the memory cell bit lines and the sub data lines. The memory further includes N-bit main data lines, where N denotes a given natural number. In addition, the memory includes data line selecting gates. The sub data lines are connected to the main data lines via the data line selecting gates. A data line selector serves to select and make conductive members of the data line selecting gates so that data can be transmitted between N successive members of the sub data lines and the main data lines.

    摘要翻译： 存储器包括存储单元阵列单元，连接到存储单元阵列单元的多个存储单元位线，多个列选择栅极和经由列选择栅极连接到存储单元位线的多个子数据线 。 列选择器用于选择和制造列选择门的导电构件，使得可以在存储单元位线的连续构件和子数据线之间传输数据。 存储器还包括N位主数据线，其中N表示给定的自然数。 此外，存储器包括数据线选择门。 子数据线经由数据线选择门连接到主数据线。 数据线选择器用于选择和制造数据线选择门的导电构件，使得可以在子数据线的N个连续成员和主数据线之间传输数据。

    Automotive headlamp, heat radiating mechanism, light-emitting apparatus and light source fixing member
    36.
    发明授权
    Automotive headlamp, heat radiating mechanism, light-emitting apparatus and light source fixing member 有权
    汽车前照灯，散热机构，发光装置和光源固定部件

    公开(公告)号：US09134003B2

    公开(公告)日：2015-09-15

    申请号：US13493330

    申请日：2012-06-11

    申请人： Takashi Inoue ,  Tetsuya Suzuki ,  Akihiro Matsumoto ,  Naoki Sone ,  Takanori Namba ,  Hidetada Tanaka

    发明人： Takashi Inoue ,  Tetsuya Suzuki ,  Akihiro Matsumoto ,  Naoki Sone ,  Takanori Namba ,  Hidetada Tanaka

    IPC分类号： F21V21/00 ,  F21S8/10

    CPC分类号： F21V29/763 ,  F21S41/147 ,  F21S41/192 ,  F21S45/43 ,  F21S45/47 ,  F21S45/49 ,  F21V19/0025

    摘要： In an automotive headlamp, a light-emitting module is configured such that a light-emitting element and a control circuit unit for controlling the lighting of the light-emitting element are structured integrally with each other. A control circuit unit in a position anterior to the light-emitting element in a lamp unit is located below a shade section so that the control circuit unit can be clear of the path of light used to form a low beam light distribution pattern of the light emitted by the light-emitting element. In this setting, the light-emitting element is so located that a main optical axis Ax2 is perpendicular respect to an optical axis Ax1 of the lamp unit and that a light-emitting portion of the light-emitting element protrudes higher than the control circuit unit in the direction of the main optical axis Ax2.

    摘要翻译： 在汽车前照灯中，发光模块被配置为使得用于控制发光元件的点亮的发光元件和控制电路单元彼此一体地构造。 在灯单元中位于发光元件前方的位置处的控制电路单元位于阴影部分的下方，使得控制电路单元可以清除用于形成光的近光配光图案的光的路径 由发光元件发射。 在这种情况下，发光元件的位置使得主光轴Ax2相对于灯单元的光轴Ax1垂直，并且发光元件的发光部分比控制电路单元突出 在主光轴Ax2的方向上。

    Choosing a printing device based on accumulated power consumption in a network
    37.
    发明授权
    Choosing a printing device based on accumulated power consumption in a network 失效
    基于网络中的累积功耗选择打印设备

    公开(公告)号：US08576433B2

    公开(公告)日：2013-11-05

    申请号：US13154078

    申请日：2011-06-06

    申请人： Akihiro Matsumoto

    发明人： Akihiro Matsumoto

    IPC分类号： G06F3/12

    CPC分类号： G06K15/4055 ,  G03G15/5004 ,  G03G2215/00021 ,  G06F3/1221

    摘要： One aspect of the present invention provides an information processing apparatus comprising: an acquisition unit configured to acquire the print request from the client; a selection unit configured to select the first printing apparatus when the accumulated power consumption is not more than a first threshold, and selects the second printing apparatus when the accumulated power consumption is higher than the first threshold; and an accumulation unit configured to add a power to be consumed by the printing apparatus selected by the selection unit to process the print request to the accumulated power consumption stored in the storage unit.

    摘要翻译： 本发明的一个方面提供了一种信息处理设备，包括：获取单元，被配置为从客户端获取打印请求; 选择单元，被配置为当所述累积功耗不大于第一阈值时选择所述第一打印装置，并且当所述累积功耗高于所述第一阈值时，选择所述第二打印装置; 以及累积单元，被配置为将由所述选择单元选择的所述打印设备消耗的功率添加到处理所述打印请求到所述存储单元中存储的累积功耗。

    AUTOMOTIVE HEADLAMPS
    38.
    发明申请
    AUTOMOTIVE HEADLAMPS 有权
    汽车头灯

    公开(公告)号：US20120163008A1

    公开(公告)日：2012-06-28

    申请号：US13393777

    申请日：2010-08-25

    申请人： Akihiro Matsumoto ,  Tetsuya Suzuki ,  Tomoyuki Nakagawa

    发明人： Akihiro Matsumoto ,  Tetsuya Suzuki ,  Tomoyuki Nakagawa

    IPC分类号： B60Q1/04

    CPC分类号： F21S41/147 ,  F21S41/192 ,  F21Y2115/10 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00

    摘要： An automotive headlamp is provided with: a light-emitting module; a control circuit unit configured to control the lighting of the light-emitting module; a support substrate configured to support both the light-emitting module and the control circuit unit; and a reflector configured to reflect, through an inner surface of the reflector, light emitted by the light-emitting module and collect the reflected light. The support substrate is arranged in a manner such that the control circuit unit is positioned in a region outside the reflector.

    摘要翻译： 汽车前照灯设有：发光模块; 被配置为控制所述发光模块的点亮的控制电路单元; 支撑基板，被配置为支撑发光模块和控制电路单元; 以及反射器，被配置为通过反射器的内表面反射由发光模块发射的光并收集反射光。 支撑基板的布置方式使得控制电路单元位于反射器外部的区域中。

    Video signal processor
    40.
    发明授权
    Video signal processor 失效
    视频信号处理器

    公开(公告)号：US07548279B2

    公开(公告)日：2009-06-16

    申请号：US11305156

    申请日：2005-12-19

    申请人： Hirotoshi Miyazawa ,  Akihiro Matsumoto

    发明人： Hirotoshi Miyazawa ,  Akihiro Matsumoto

    IPC分类号： H04N9/73 ,  H04N9/64

    CPC分类号： H04N9/68

    摘要： In the event that the maximum Imax of R, G, B color signals is detected and the maximum value Imax is equal to or higher than the suppression start level Vcs which is lower than a predetermined level to be restricted, a suppression gain is generated in accordance with the value of this maximum Imax, and by this suppression gain Gc, R, G, B color signals to be inputted are simultaneously suppressed. By this, color signals can be restricted to the predetermined range and outputted without impairing white balance.

    摘要翻译： 在检测到R，G，B颜色信号的最大Imax，并且最大值Imax等于或高于低于要限制的预定电平的抑制开始电平Vcs的情况下，产生抑制增益 根据该最大值Imax的值，并且同时抑制要输入的抑制增益Gc，R，G，B颜色信号。 由此，可以将颜色信号限制在预定范围并输出而不会损害白平衡。