摘要:
A hybrid digital pulse width modulator can have a delay line with digitally programmable delay cells. The digitally programmable delay cells can be adjusted by a digital correction signal from a delay matching circuit.
摘要:
A voltage controller (150), the controller comprising: a voltage comparator (700) operative to provide a digital error signal (152); a compensator (300) operative to determine a digital control signal (154) based on said provided error signal; and a modulator (400) operative to provide a power control signal (156) based on said determined digital control signal, wherein said comparator, said compensator, and said modulator are implemented entirely with digital logic gates.
摘要:
Exemplary embodiments are directed to a power controller. A method may include comparing a summation voltage comprising a sum of an amplified error voltage and a reference voltage with an estimated voltage to generate a comparator output signal. The method may also include generating a gate drive signal from the comparator output signal and filtering a signal coupled to a power stage to generate the estimated voltage.
摘要:
A circuit converts an input voltage to an output voltage. The circuit includes a first stage voltage converter that receives the input voltage and converts the input voltage. The first stage voltage converter includes a first buck converter having a double rail output: a first rail at a high intermediate voltage and a second rail at a low intermediate voltage. The circuit also includes a second stage voltage converter that receives the output rails and produces the output voltage.
摘要:
A practical method and system for oversampled digitally controlled DC-DC converters is presented. To minimize the switching losses while maintaining all advantages of the oversampling, “glue logic” and application specific oversampling digital pulse-width modulator are introduced. Experimental results demonstrate transient response with 50% smaller deviation than that of conventional controllers, allowing for proportional reduction in the size of the power stage output capacitor.
摘要:
A practical method and system for oversampled digitally controlled DC-DC converters is presented. To minimize the switching losses while maintaining all advantages of the oversampling, “glue logic” and application specific oversampling digital pulse-width modulator are introduced. Experimental results demonstrate transient response with 50% smaller deviation than that of conventional controllers, allowing for proportional reduction in the size of the power stage output capacitor.
摘要:
A multiphase hybrid digital pulse width modulator can comprise a counter that is selectable between at least two different numbers of states to indicate a first portion of a switching period. Unclocked logic can indicate a second portion of the switching period. The unclocked logic can include a delay line.
摘要:
A multiphase hybrid digital pulse width modulator can comprise a counter that is selectable between at least two different numbers of states to indicate a first portion of a switching period. Unclocked logic can indicate a second portion of the switching period. The unclocked logic can include a delay line.
摘要:
A switch-mode power supply (SMPS) with auto-tuning using limit-cycle oscillation response evaluation provides optimized performance with reduced capacitance and inductance requirements for a given design. During operation of the SMPS, parameters of the converter are extracted, and the feedback and/or feed-forward compensation is adjusted to either hold the loop bandwidth of the converter near the critical bandwidth of the output capacitors, or maintain output voltage transients within a specified limit. The compensator response is either periodically updated, or is updated in response to an event, such as detection of a transient voltage spike having a characteristic that exceeds one or more predetermined thresholds.
摘要:
A digital controller for low-power DC-DC switch mode power supplies (SMPS) suitable for on-chip implementation and use in portable battery-powered systems is provided. The digital controller allows operation at ultra high constant switching frequencies and can be implemented with a simple low-power digital hardware. The digital controller includes a digital pulse width modulator (DPWM), based on a multibit 2nd orders sigma-delta (Σ-Δ) principle, and a dual-sampling mode PID compensator. The output voltage is either sampled at a frequency lower than the switching frequency (undersampled) or sampled at the switching rate. In steady-state, undersampling results in reduced power consumption, while during transients, sampling at the switching rate provides fast transient response. Another aspect of the present invention is a dual sampling/clocking scheme, which is relied on by the DPWM described. A method is also provided for controlling low power DC-DC switch mode power supplies operating at high constant switching frequencies.