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公开(公告)号:US20200235321A1
公开(公告)日:2020-07-23
申请号:US16597905
申请日:2019-10-10
Applicant: BOE Technology Group Co., Ltd.
Inventor: Shipei LI , Qi YAO , Wusheng LI , Jiangnan LU , Huili WU , Fang HE , Renquan GU , Dongsheng YIN , Sheng XU , Wei HE
Abstract: A display panel is provided, including a substrate on a base, a transistor stack on the substrate, and a fluorescent layer between the base and the transistor stack. The fluorescent layer is configured to prevent light from damaging an active layer in the transistor stack in a laser lift-off process, and an orthographic projection of the fluorescent layer on the base overlaps an orthographic projection of the active layer on the base. A display device comprising the display panel, and a manufacturing method of the display panel are further provided.
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32.
公开(公告)号:US20200012832A1
公开(公告)日:2020-01-09
申请号:US16441687
申请日:2019-06-14
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Yang YUE , Shi SHU , Chuanxiang XU , Jiangnan LU , Haitao HUANG
IPC: G06K9/00
Abstract: The present disclosure provides a light receiving stacked-hole structure and a fabrication method thereof, and a fingerprint recognition device. The method includes forming a base light blocking layer having a first opening on a first surface of a substrate; forming at least one overlying light blocking layer having a second opening on a side of the base light blocking layer away from the substrate, wherein the overlying light blocking layer having the second opening is formed by using the base light blocking layer as a mask plate.
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33.
公开(公告)号:US20190115546A1
公开(公告)日:2019-04-18
申请号:US15994197
申请日:2018-05-31
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Jiangnan LU , Shi SHU , Chuanxiang XU
CPC classification number: H01L51/0096 , H01L27/322 , H01L27/3246 , H01L27/3253 , H01L51/5215 , H01L51/5228 , H01L51/5284 , H01L51/56 , H01L2251/5315
Abstract: An opposite substrate, a method for manufacturing the opposite substrate, an organic light-emitting display panel and a display device are provided by the embodiments of the present disclosure. The opposite substrate includes a base substrate, an auxiliary electrode on the base substrate, a planarization layer on a side of the auxiliary electrode facing away from the base substrate, a spacer on a side of the planarization layer facing away from the base substrate, and a conductive layer on a side of the spacer facing away from the base substrate. The conductive layer at least covers a surface of the spacer facing away from the base substrate, and the conductive layer is electrically connected with the auxiliary electrode through a via hole structure passing through the planarization layer.
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34.
公开(公告)号:US20250166568A1
公开(公告)日:2025-05-22
申请号:US19032469
申请日:2025-01-21
Applicant: BOE Technology Group Co., Ltd.
Inventor: Guangliang SHANG , Jiangnan LU , Li WANG , Mengyang WEN , Xing YAO , Libin LIU
IPC: G09G3/3233 , G09G3/3266 , G09G3/3275
Abstract: Provided is a display substrate, a drive method thereof and a display apparatus, the display substrate includes: a first drive mode and a second drive mode, the first drive mode has a refresh rate less than that of the second drive mode, wherein the contents displayed on the display substrate include a plurality of display frames, in the first drive mode, the display frames include: a refresh frame and at least one maintain frame; the display substrate includes pixel circuits arranged in an array, the pixel circuits include a data signal line and a first initial signal line; the data signal line provides a first data signal in the maintain frame, the voltage value of the first data signal is constant, and/or the first initial signal line provides a first initial signal in the refresh frame and the maintain frame, the first initial signal is an AC signal.
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公开(公告)号:US20250124879A1
公开(公告)日:2025-04-17
申请号:US18687988
申请日:2022-11-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangliang SHANG , Jianchao ZHU , Jiangnan LU , Yu FENG , Rui XU , Xing YAO
IPC: G09G3/3266
Abstract: Provided are a display panel, a display apparatus and a method for driving the display panel. The display panel includes: multiple gate lines; and multiple shift register units, a target shift register unit of the shift register units includes: a frame trigger selecting circuit and a gate driving circuit; the frame trigger selecting circuit is coupled to a frame trigger input terminal and frame starting signal terminals corresponding to N cascade groups, and outputs, in response to an nth turn-on signal of N turn-on signals corresponding to an nth cascade group, a starting signal input to the frame trigger input terminal to a frame starting signal terminal corresponding to the nth cascade group; 1≤n≤N, and n is an integer; the nth cascade group scans the gate lines coupled thereto line by line after the frame starting signal terminal corresponding thereto receives the starting signal.
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公开(公告)号:US20240304266A1
公开(公告)日:2024-09-12
申请号:US18245030
申请日:2022-05-26
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiangnan LU , Guangliang SHANG , Jianchao ZHU , Zhenzhen SHAN , Xing YAO
IPC: G11C19/28 , G09G3/3225
CPC classification number: G11C19/287 , G09G3/3225 , G09G2300/0426 , G09G2310/0286
Abstract: A shift register unit includes: an input circuit configured to provide an input signal to a first node in response to a first clock signal; a reset circuit configured to provide a first reference signal to a second node in response to a second clock signal; a first control circuit configured to provide the second clock signal to the second node in response to a first control signal; an output circuit configured to provide a third clock signal to a drive output terminal in response to a signal of the first node, and provide a second reference signal to the drive output terminal in response to a signal of the second node; where a duration of an active level of the first control signal is longer than a duration of an active level of a signal of the drive output terminal.
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公开(公告)号:US20240206266A1
公开(公告)日:2024-06-20
申请号:US18590203
申请日:2024-02-28
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiangnan LU , Guangliang SHANG , Can ZHENG , Yu FENG , Libin LIU , Jie ZHANG , Mei LI
IPC: H10K59/131 , H10K59/80
CPC classification number: H10K59/131 , H10K59/8051
Abstract: Provided is an organic light-emitting diode display substrate, including: a source/drain layer, a planarization layer and an anode layer which are laminated in sequence, wherein the source/drain layer includes at least one pair of first signal lines; the anode layer includes a common power line, wherein the common power line is provided with vent holes; overlapping areas between two first signal lines in each pair of the first signal lines and a projection pattern of the vent hole are equal, the overlapping area being greater than 0, wherein the projection pattern of the vent hole is a pattern of an orthographic projection of the vent hole in the common power line on the source/drain layer. A display panel and a display device are also provided.
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公开(公告)号:US20240177662A1
公开(公告)日:2024-05-30
申请号:US17789918
申请日:2021-06-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Libin LIU , Jiangnan LU , Shimming SHI , Li WANG
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0426 , G09G2300/0842 , G09G2320/0233 , G09G2320/0247 , G09G2320/066
Abstract: An array substrate and a display device are provided. The array substrate includes a plurality of pixel driving circuits, each of which includes a driving transistor, a first light emitting control transistor, a compensation transistor, a first initialization transistor and a second initialization transistor; a first electrode of the first initialization transistor and a first electrode of the first light emitting control transistor are connected to a first node; a first electrode of the second initialization transistor and a first electrode of the compensation transistor are connected to a second node, a second electrode of the first initialization transistor is configured to receive the first initialization signal, and a cathode of the light emitting element is configured to receive a first driving signal, and a difference between a potential of the first initialization signal and a potential of the first driving signal is less than 1.5V.
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39.
公开(公告)号:US20240071312A1
公开(公告)日:2024-02-29
申请号:US17765045
申请日:2021-03-23
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangliang SHANG , Jiangnan LU , Long HAN , Li WANG , Libin LIU , Xinshe YIN , Shiming SHI
IPC: G09G3/3266
CPC classification number: G09G3/3266 , G09G2310/0286 , G11C19/287
Abstract: A shift register circuit includes a first control sub-circuit and a first output sub-circuit. The first control sub-circuit is configured to: adjust a voltage of a first node to a turn-on voltage due to an influence of a first direct current voltage signal from a first clock signal terminal, an initial voltage signal from an initial signal terminal and a second direct current voltage signal from a second clock signal terminal; and maintain the voltage of the first node at the turn-on voltage due to an influence of a first clock signal from the first clock signal terminal and a second clock signal from the second clock signal terminal. The first output sub-circuit is configured to be turned on under a control of the turn-on voltage of the first node to transmit a first voltage signal from a first voltage terminal to a signal output terminal.
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40.
公开(公告)号:US20230360608A1
公开(公告)日:2023-11-09
申请号:US17630634
申请日:2021-03-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangliang SHANG , Can ZHENG , Jiangnan LU , Yuhan QIAN , Li WANG , Libin LIU , Shiming SHI , Dawei WANG
IPC: G09G3/3266 , G11C19/28
CPC classification number: G09G3/3266 , G11C19/28 , G09G2310/0286
Abstract: A shift register unit, a method for driving a shift register unit, a gate driving circuit, and a display device are provided. The shift register unit includes: a second noise reduction control circuit. The second noise reduction control circuit includes: a first control circuit, configured to transmit a first voltage to a second noise reduction control node; a first coupling circuit, configured to store a level of the second noise reduction control node and adjust the level of the second noise reduction control node; a second coupling circuit, configured to reduce an adjustment magnitude of the first coupling circuit in case of adjusting the level of the second noise reduction control node; a transmission circuit, configured to connect the first noise reduction control node and the second noise reduction control node; and a storage circuit, configured to store the level of the first noise reduction control node.
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