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31.发明授权公开(公告)号：US09831059B2
公开(公告)日：2017-11-28
申请号：US15107090
申请日：2015-12-28
发明人： Zhiying Bao , Xiaochuan Chen , Wenbo Jiang , Shijun Wang , Lei Wang , Yue Li , Yanna Xue , Zhenhua Lv , Wenjun Xiao , Yong Zhang
CPC分类号： H01J29/021 , G09G3/2092 , H01J9/025 , H01J9/185 , H01J29/32 , H01J29/96 , H01J31/127 , H01J2209/0223 , H01J2229/186 , H01L27/124 , H01L27/1248 , H01L27/1259
摘要： The present application discloses an array substrate comprising a first substrate, a first electrode on the first substrate, a passivation layer on a side of the first electrode distal to the first substrate, the passivation layer comprising a plurality of first vias, each of which corresponds to a different part of the first electrode, an electron emission source layer on a side of the first electrode distal to the first substrate comprising at least one electron emission source in each of the plurality of first vias, and a dielectric layer on a side of the first electrode distal to the first substrate comprising a plurality of dielectric blocks corresponding to the plurality of first vias, at least a portion of each of the plurality of dielectric blocks in each of the plurality of first vias. The at least one electron emission source comprises a first portion having a first end and a second portion having a second end. The first end is in contact with the first electrode, the first portion is within a corresponding one of the plurality of dielectric blocks. The second portion and the second end are outside the corresponding one of the plurality of dielectric blocks.
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公开(公告)号：US09547196B2
公开(公告)日：2017-01-17
申请号：US15022378
申请日：2015-07-21
发明人： Xiaochuan Chen , Shijun Wang , Lei Wang , Yanna Xue , Wenbo Jiang , Yue Li , Zhiying Bao , Wenjun Xiao , Zhenhua Lv , Yong Zhang
IPC分类号： H01L27/12 , G02F1/133 , G02F1/13363 , G02F1/1362 , G02F1/1335
CPC分类号： G02F1/13363 , G02F1/133512 , G02F1/136209 , G02F1/136286 , G02F2001/133638 , H01L27/124 , H01L27/1259
摘要： An array substrate and a manufacturing method thereof and a display are disclosed. The array substrate includes a base substrate, a plurality of sub-pixels disposed on the base substrate, and a phase shift pattern disposed on the base substrate to separate the sub-pixels; the phase shift pattern is disposed to allow light passing through the phase shift pattern to undergo phase shift, and positions corresponding to the phase shift pattern are substantially opaque to light. Lateral light leakage is reduced by the phase shift pattern, and transmission rate of products become uniform, and therefore stability of products are increased.
摘要翻译： 公开了阵列基板及其制造方法和显示器。 阵列基板包括基底基板，设置在基底基板上的多个子像素和设置在基底基板上以分离子像素的相移图案; 相移图案被设置为允许通过相移图案的光经历相移，并且对应于相移图案的位置对于光基本上是不透明的。 横向光泄漏由相移模式降低，产品的传输速率均匀，因此产品的稳定性提高。
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公开(公告)号：US11715401B2
公开(公告)日：2023-08-01
申请号：US16957575
申请日：2019-07-31
发明人： Zhaohui Meng , Wei Sun , Wenchao Han , Hong Yang , Lin Cong , Wenjun Xiao
IPC分类号： G09G3/20
CPC分类号： G09G3/20 , G09G2310/0254 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/08 , G09G2320/02
摘要： A display panel, a display device and a driving method. The display panel includes a display region and a peripheral region. The display region includes a subpixel unit array having a plurality of rows and a plurality of columns of subpixel units, and the peripheral region includes a gate drive circuit. The display region further includes a plurality of gate lines and a plurality of data lines. Each subpixel unit is driven by a scanning signal provided by one gate and a data signal provided by one data line, and a same data line is connected with at least two subpixel units which are not adjacent to each other and have a same color. The gate drive circuit includes a plurality of shift register units, and the plurality of gate lines are electrically connected with the plurality of shift register units in a one-to-one correspondence in order.
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公开(公告)号：US20210181886A1
公开(公告)日：2021-06-17
申请号：US16080608
申请日：2018-03-22
发明人： Gang Hua , Lei Mi , Yanna Xue , Yong Zhang , Zhiying Bao , Lu Bai , Jingpeng Wang , Haobo Fang , Wenjun Xiao
IPC分类号： G06F3/041 , G02F1/1333 , G02F1/1368 , G02F1/1362 , G06F3/044
摘要： The present application provides a touch control array substrate. The touch control array substrate includes a touch electrode layer having a plurality of touch electrode blocks configured to detect a touch and configured to provide at least a portion of back light for image display in the touch control array substrate by reflecting ambient light.
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公开(公告)号：US10586871B2
公开(公告)日：2020-03-10
申请号：US15220717
申请日：2016-07-27
发明人： Zhenhua Lv , Zhiying Bao , Shijun Wang , Yong Zhang , Wenjun Xiao , Jingbo Xu
IPC分类号： H01L29/786 , G02F1/1368 , H01L27/12
摘要： The present disclosure provides a thin film transistor, an array substrate, a display panel and a display device. The thin film transistor comprises a gate layer, a source and a drain located on the gate layer, and an active layer located on the source and the drain. The active layer is electrically connected to the source and the drain. The active layer comprises two sides arranged in parallel, and each side forms an acute angle of 45° with a face of the drain facing the source.
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公开(公告)号：US20190204640A1
公开(公告)日：2019-07-04
申请号：US16016878
申请日：2018-06-25
发明人： Yanchen Li , Yue Li , Jian Wang , Yu Zhao , Wenjun Xiao
IPC分类号： G02F1/1343 , G02F1/1362 , G02F1/133 , G09G3/36
摘要： Provided is a liquid crystal grating including: a first substrate; a second substrate opposite to the first substrate; a liquid crystal layer between the first substrate and the second substrate; a first electrode structure on the first substrate; and a second electrode structure on the second substrate. The first electrode structure and the second electrode structure are configured to receive control signals, the control signal including a first set of control signals and a second set of control signals; to cause the liquid crystal grating to have a first grating pitch in response to the first set of control signals; and to cause the liquid crystal grating to have a second grating pitch in response to the second set of control signals, the second grating pitch being different from the first grating pitch.
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公开(公告)号：US10285296B2
公开(公告)日：2019-05-07
申请号：US15030637
申请日：2015-07-20
发明人： Wenjun Xiao , Xiaochuan Chen , Yue Li
IPC分类号： G02F1/1339 , H05K5/06 , G02F1/1335 , G02F1/1341 , C09J11/04 , C09J11/06 , H05K5/00 , C09J11/02 , C08K3/38 , C08K5/18
摘要： A display panel, a fabrication method thereof and a display device are provided. The display panel has a display region (100) and a frame region (200). The display panel comprises an array substrate (01) and an opposed substrate (02) provided opposite to each other; a pattern of peripheral circuits and wires (03) is provided within the frame region (200) on a side of the array substrate (01) facing the opposed substrate (02), a pattern of a black matrix (04) is provided on the side of the array substrate (01) facing the opposed substrate (02) and/or on a side of the opposed substrate (02) facing the array substrate (01), and an orthogonal projection of the pattern of the peripheral circuits and wires (03) on the array substrate (01) does not overlap an orthogonal projection of the pattern of the black matrix (04) on the array substrate (01); and a sealant (05) which has underwent a curing treatment is provided in the frame region (200) and between the array substrate (01) and the opposed substrate (02), and the sealant (05) includes a substance formed of a thermochromic material which has changed its color in a process of the curing treatment.
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公开(公告)号：US10217422B2
公开(公告)日：2019-02-26
申请号：US15070422
申请日：2016-03-15
发明人： Yue Li , Xiaochuan Chen , Lei Wang , Wenjun Xiao
IPC分类号： G09G3/34
摘要： An array substrate, a driving method thereof and an electronic paper. The array substrate includes a base substrate; a plurality of gate lines and a plurality of data lines disposed on the base substrate, the plurality of gate lines and the plurality of data lines being insulated from each other and extending across each other; a gate driving circuit disposed on the base substrate and electrically connected with the gate lines; and a data driving circuit disposed on the base substrate and electrically connected with the data lines. During a display period of a frame, the gate driving circuit is configured to load gate scanning signals to respective gate lines sequentially; and while each gate line is loaded with a respective gate scanning signal, the data driving circuit is configured to transmit data signals to the data lines.
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公开(公告)号：US10204536B2
公开(公告)日：2019-02-12
申请号：US15022537
申请日：2015-10-22
发明人： Yanna Xue , Xiaochuan Chen , Hailin Xue , Yue Li , Yong Zhang , Wenjun Xiao
IPC分类号： G09G3/20 , G02F1/1362 , G09G3/3225 , G09G3/3275 , G09G3/36 , H01L27/32
摘要： The present disclosure relates to an array substrate, a display panel, a display device and a driving method. The array substrate includes a plurality of sub-pixel dot matrix units. In each of the plurality of sub-pixel dot matrix units, the sub-pixels in a same row are connected to data lines arranged on a same side of the sub-pixels respectively, the sub-pixels in the rows where the sub-pixels are arranged in a same sequence are connected to the data lines in a same direction, and two first base color sub-pixels in at least two adjacent rows are connected to a same data line.
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公开(公告)号：US09881556B2
公开(公告)日：2018-01-30
申请号：US15233983
申请日：2016-08-11
发明人： Yong Zhang , Shijun Wang , Yanna Xue , Yue Li , Wenbo Jiang , Wenjun Xiao , Zhiying Bao , Zhenhua Lv
IPC分类号： G09G3/3258 , G09G3/3266 , G11C19/28
CPC分类号： G09G3/3258 , G09G3/3266 , G09G2300/0426 , G09G2310/0251 , G09G2310/0286 , G09G2310/08 , G09G2320/0252 , G09G2330/021 , G11C19/28
摘要： The present disclosure provides a shift register circuit, which includes a first switch unit connecting an input end to a first node when a positive-phase clock signal is at a first level; a second switch unit applying a negative-phase clock signal to an output end when the first node is at the first level; a positive feedback unit enabling the second node to be at a second level when the first node is at the first level and enabling the first node to be at the second level when the second node is at the first level; a third switch unit enabling a third node to be at the first level when the positive-phase clock signal is at the first level; a fourth switch unit connecting the second node to the third node when the negative-phase clock signal is at the first level; and a fifth switch unit.
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