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公开(公告)号：US20240428731A1
公开(公告)日：2024-12-26
申请号：US18288451
申请日：2023-01-03
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ying HAN , Pan XU , Mingi CHU , Donghui ZHAO , Xing ZHANG , Chengyuan LUO , Guangshuang LV , Miao LIU , Xing YAO
IPC: G09G3/3233 , G09G3/3266 , G09G3/3291
Abstract: A pixel driving circuit is provided to include: a driving transistor; a data writing circuit configured to write a display data voltage from the data line to a first node in a display driving process, and sequentially write a sensing data voltage and a reset data voltage from the data line to the first node in a threshold voltage sensing process; a threshold compensation circuit configured to write a reference voltage from a reference voltage supply terminal to the first node and write a first compensation voltage to a second node in the display driving process, and write a second compensation voltage to the second node when a voltage at the first node changes from the reference voltage to the display data voltage; a sensing circuit configured to write an initialization voltage from the sensing line to the second node in the threshold voltage sensing process; a light emitting element.
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公开(公告)号：US20240373701A1
公开(公告)日：2024-11-07
申请号：US18682189
申请日：2023-01-31
Inventor： Xing YAO , Xueguang HAO , Yong QIAO , Jingquan WANG , Xinyin WU
IPC: H10K59/131 , G09G3/3266 , G11C19/28 , H10K59/121
Abstract: A display substrate includes a base substrate including a display area and a peripheral area on at least one side of the display area; a pixel array, located in the display area and including multiple pixel units; and, a scan driving module, located in a driving circuit area of the peripheral area, and including multiple shift register units, multiple signal lines being arranged in one shift register units, and extending along a first direction; wherein a ratio of a sum W1 of widths of the multiple signal lines in a second direction to a width W2 of the shift register unit in the second direction is W1/W2, and a length of at least one pixel unit along the first direction is a pixel pitch value; the first direction intersects the second direction; a product of W1/W2 and the pixel pitch value is greater than 18 um and less than 40 um.
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公开(公告)号：US20240371329A1
公开(公告)日：2024-11-07
申请号：US18572742
申请日：2023-05-31
Inventor： Miao LIU , Xueguang HAO , Libin LIU , Teng CHEN , Xinyin WU , Yong QIAO , Xing YAO , Jingquan WANG
IPC: G09G3/3266 , G09G3/20 , G09G3/3233 , G11C19/28 , H10K59/121 , H10K59/126
Abstract: The display substrate includes a shift register arranged on a base substrate, and the shift register includes a plurality of stages of driving circuits; a plurality of stages of the driving circuit are provided in the driving circuit area of the base substrate; a stage of driving circuit area includes a first area and a second area, and the first area is provided with a first type of transistor included in the driving circuit, a second type of transistor included in the driving circuit is provided in the second area; one side of the first area is a side of the power line away from the second area, and the other side of the first area is a side close to the second area of an active layer of the first type of transistor close to the second area.
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公开(公告)号：US20240371316A1
公开(公告)日：2024-11-07
申请号：US18777590
申请日：2024-07-19
Inventor： Miao LIU , Xueguang HAO , Jingbo XU , Xing YAO , Jingquan WANG , Xinyin WU , Xinguo LI , Zhichong WANG
IPC: G09G3/32 , G09G3/3208 , G09G3/3266
Abstract: A display substrate, including a scan drive control circuit including an input circuit, an output control circuit, and an output circuit; the input circuit is configured to transmit a signal of the signal input terminal to the output control circuit and a signal of the first clock signal terminal or the first voltage terminal to the output control circuit; the output control circuit is configured to store a signal of the first signal terminal, and transmit a signal of the second signal terminal to the first node; or, the output control circuit is configured to store a signal of the second clock signal terminal, and transmit a signal of the second voltage terminal to the first node; the output circuit is configured to output a signal of the first voltage terminal to the signal output terminal, or output the signal of the second voltage terminal to the signal output terminal.
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公开(公告)号：US20240321197A1
公开(公告)日：2024-09-26
申请号：US18027376
申请日：2022-05-12
Applicant: BOE Technology Group Co., Ltd.
Inventor： Guangliang SHANG , Jiangnan LU , Li WANG , Mengyang WEN , Xing YAO , Libin LIU
IPC: G09G3/3233 , G09G3/3266 , G09G3/3275
CPC classification number: G09G3/3233 , G09G3/3266 , G09G3/3275 , G09G2310/08 , G09G2320/0247 , G09G2330/021
Abstract: Provided is a display substrate, a drive method thereof and a display apparatus, the display substrate includes: a first drive mode and a second drive mode, the first drive mode has a refresh rate less than that of the second drive mode, wherein the contents displayed on the display substrate include a plurality of display frames, in the first drive mode, the display frames include: a refresh frame and at least one maintain frame; the display substrate includes pixel circuits arranged in an array, the pixel circuits include a data signal line and a first initial signal line; the data signal line provides a first data signal in the maintain frame, the voltage value of the first data signal is constant, and/or the first initial signal line provides a first initial signal in the refresh frame and the maintain frame, the first initial signal is an AC signal.
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Patent Agency Ranking
公开(公告)号：US20240290271A1
公开(公告)日：2024-08-29
申请号：US18044967
申请日：2022-06-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zhenzhen SHAN , Jiangnan LU , Guangliang SHANG , Libin LIU , Jianchao ZHU , Xing YAO
IPC: G09G3/3258
CPC classification number: G09G3/3258 , G09G2300/0426
Abstract: A display substrate includes a driving module arranged on the base substrate, the driving module includes a plurality of driving units, and the driving unit includes a plurality of stages of driving circuits; the driving unit includes a first signal line, and the driving circuit includes an output sub-circuit; the display substrate includes at least two metal layers stacked along a direction away from the base substrate; in at least one driving unit, an orthographic projection of the first signal line on the base substrate at least partially overlaps an orthographic projection of a first electrode or a second electrode of at least one transistor included in the output sub-circuit on the base substrate, the first electrode and the second electrode are arranged on the same metal layer, and the first electrode and the first signal line are arranged on different metal layers.
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公开(公告)号：US20240046872A1
公开(公告)日：2024-02-08
申请号：US18268361
申请日：2021-11-26
Inventor： Gansong YANG , Yunpeng ZHANG , Ming YANG , Yanhong DING , Ke LIU , Miao LIU , Xing YAO
IPC: G09G3/3233 , G09G3/3266
CPC classification number: G09G3/3233 , G09G3/3266 , G09G2300/0819 , G09G2300/0842 , G09G2300/0408 , G09G2310/08 , G09G2310/0281 , G09G2310/0286 , G09G2320/045 , G09G2300/0426
Abstract: A display substrate is provided to include: a base substrate including a display area and a peripheral area surrounding the display area; pixel units in array are in the display area; a driving module is in the peripheral area and is configured to provide electrical signals for the pixel units, to control the pixel units to operate; the driving module includes driving circuits each provided with a corresponding operating signal line group in the peripheral area; the signal line group includes at least two operating signal lines connected to the corresponding driving circuit, to provide electrical signals thereto; the at least two operating signal lines include first and second clock signal lines; the first clock signal lines for at least two driving circuits are a same first clock signal line; and/or the second clock signal lines for the at least two driving circuits are a same second clock signal line.
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公开(公告)号：US20230252945A1
公开(公告)日：2023-08-10
申请号：US18302056
申请日：2023-04-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing YAO , Chen XU , Jingquan WANG , Xinyin WU
IPC: G09G3/3266 , H10K59/126 , H10K59/131
CPC classification number: G09G3/3266 , H10K59/126 , H10K59/131 , G09G2300/0426 , G09G2310/0286
Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, and a first scan driving circuit, a second scan driving circuit and a first power line arranged in sequence, and a first shielding layer and a second shielding layer sequentially arranged on a side of the second scan driving circuit away from the base substrate; the first shielding layer covers at least one transistor in the second scan driving circuit, and the second shielding layer covers at least one transistor of transistors in the second scan driving circuit except the at least one transistor covered by the first shielding layer; and the second shielding layer is also on a side of the first scan driving circuit away from the base substrate, and the second shielding layer covers at least one transistor in the first scan driving circuit.
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39.发明申请公开(公告)号：US20200219576A1
公开(公告)日：2020-07-09
申请号：US16697889
申请日：2019-11-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing YAO , Mingfu HAN , Guangliang SHANG , Haoliang ZHENG , Lijun YUAN , Zhenyu ZHANG
Abstract: A shift register unit and a method for driving the same, a gate drive circuitry and a display device are provided. The shift register unit includes: an output circuit, coupled to a first signal output terminal and a pull-up control node, and configured to receive a first clock signal and output the first clock signal to the first signal output terminal under control of a potential of the pull-up control node; an output control circuit, coupled to a signal input terminal, the pull-up control node and the first signal output terminal; a clock control circuit configured to receive a first clock signal and at least one additional clock signal and generate a second clock signal using the first clock signal and the at least one additional clock signal; and a transmission circuit coupled to a second signal output terminal and the pull-up control node.
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公开(公告)号：US20200082757A1
公开(公告)日：2020-03-12
申请号：US16399612
申请日：2019-04-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Lijun YUAN , Guangliang SHANG , Xing YAO , Haoliang ZHENG , Mingfu HAN
IPC: G09G3/3258 , G09G3/3233 , G09G3/3291 , G09G3/3266 , H01L27/32
Abstract: The present disclosure provides a pixel driving circuit and a method for driving the same, a pixel unit, and a display panel. The pixel circuit includes: a driving sub-circuit, configured to generate driving current based on a data signal and a first voltage; a first light-emitting control sub-circuit configured to receive a first control signal and the first voltage, and provide the first voltage to the driving sub-circuit under control of the first control signal; a second light-emitting control sub-circuit configured to receive a second control signal and provide driving current generated by the driving sub-circuit to an output terminal of the pixel driving circuit under control of the second control signal; a driving control sub-circuit configured to receive the second control signal and the data signal and provide the data signal to the driving sub-circuit under control of the second control signal; and a reset sub-circuit configured to receive a reset signal and a second voltage, and reset the driving sub-circuit using the second voltage under control of the reset signal.
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