公开(公告)号：US20170023809A1

公开(公告)日：2017-01-26

申请号：US15073240

申请日：2016-03-17

Applicant: California Institute of Technology

Inventor： Behrooz Abiri ,  Saman Saeedi ,  Seyed Ali Hajimiri ,  Azita Emami

IPC: G02F1/025 ,  G02F1/01

CPC classification number: G02F1/025 ,  G02F1/0118 ,  G02F1/0121 ,  G02F2202/105 ,  G02F2203/15

Abstract: An integrated optical modulator includes, in part, a pair of waveguides and an inductor. The first waveguide is adapted to receive an incoming optical signal. The second waveguide includes a portion placed in proximity of the first waveguide so as to enable the incoming optical signal travelling in the first waveguide to couple to the second waveguide. The second waveguide comprises a p-n junction. The inductor has a first terminal coupled to the p-n junction and a second terminal coupled to a contact pad. The second waveguide has a circular shape. The inductor optionally has a spiral shape.

Abstract translation: 集成光调制器部分地包括一对波导和电感器。 第一波导适于接收输入光信号。 第二波导包括放置在第一波导附近的部分，以使能在第一波导中行进的入射光信号耦合到第二波导。 第二波导包括p-n结。 电感器具有耦合到p-n结的第一端子和耦合到接触焊盘的第二端子。 第二波导具有圆形形状。 电感器可选地具有螺旋形状。

公开(公告)号：US09059557B2

公开(公告)日：2015-06-16

申请号：US14502864

申请日：2014-09-30

Applicant: California Institute of Technology

Inventor： Mayank Raj ,  Azita Emami

IPC: H01S3/13 ,  H01S5/06 ,  H01S5/183 ,  H01S5/068

CPC classification number: H01S5/183 ,  H01S3/13 ,  H01S3/1305 ,  H01S3/1306 ,  H01S5/0014 ,  H01S5/0035 ,  H01S5/0427 ,  H01S5/0604 ,  H01S5/0617 ,  H01S5/06213 ,  H01S5/06255 ,  H01S5/068 ,  H01S5/06808 ,  H01S5/18311

Abstract: Technologies are generally described for implementing non-linear VCSEL equalization. In some examples, a rising edge tap parameter, a falling edge tap parameter, an equalization delay and a bias current may be used to equalize a data signal to be output from a VCSEL. A VCSEL model may be used to derive a VCSEL response to one or more isolated data pulses. The derived response may then be used to determine the rising and falling edge tap parameters and an equalization delay, based on a bias current value for the VCSEL and a data rate associated with the data signal. The data signal may then be adjusted based on the equalization delay and the rising and falling edge tap parameter and sent to the VCSEL for output. At the same time, the VCSEL may be biased with a bias current having the bias current value.

Abstract translation: 通常描述了用于实现非线性VCSEL均衡的技术。 在一些示例中，可以使用上升沿抽头参数，下降沿抽头参数，均衡延迟和偏置电流来均衡要从VCSEL输出的数据信号。 可以使用VCSEL模型来导出对一个或多个隔离数据脉冲的VCSEL响应。 然后，导出的响应可以用于基于VCSEL的偏置电流值和与数据信号相关联的数据速率来确定上升沿和下降沿抽头参数以及均衡延迟。 然后可以基于均衡延迟和上升沿和下降沿抽头参数来调整数据信号，并将其发送到VCSEL以进行输出。 同时，VCSEL可以偏置具有偏置电流值的偏置电流。