公开(公告)号：US09263854B2

公开(公告)日：2016-02-16

申请号：US14726406

申请日：2015-05-29

Applicant: California Institute of Technology

Inventor： Mayank Raj ,  Azita Emami

IPC: H01S3/13 ,  H01S5/183 ,  H01S5/06 ,  H01S5/068 ,  H01S5/0625

CPC classification number: H01S5/183 ,  H01S3/13 ,  H01S3/1305 ,  H01S3/1306 ,  H01S5/0014 ,  H01S5/0035 ,  H01S5/0427 ,  H01S5/0604 ,  H01S5/0617 ,  H01S5/06213 ,  H01S5/06255 ,  H01S5/068 ,  H01S5/06808 ,  H01S5/18311

Abstract: Technologies are generally described for implementing non-linear VCSEL equalization. In some examples, a rising edge tap parameter, a falling edge tap parameter, an equalization delay and a bias current may be used to equalize a data signal to be output from a VCSEL. A VCSEL model may be used to derive a VCSEL response to one or more isolated data pulses. The derived response may then be used to determine the rising and falling edge tap parameters and an equalization delay, based on a bias current value for the VCSEL and a data rate associated with the data signal. The data signal may then be adjusted based on the equalization delay and the rising and falling edge tap parameter and sent to the VCSEL for output. At the same time, the VCSEL may be biased with a bias current having the bias current value.

公开(公告)号：US09059557B2

公开(公告)日：2015-06-16

申请号：US14502864

申请日：2014-09-30

Applicant: California Institute of Technology

Inventor： Mayank Raj ,  Azita Emami

IPC: H01S3/13 ,  H01S5/06 ,  H01S5/183 ,  H01S5/068

CPC classification number: H01S5/183 ,  H01S3/13 ,  H01S3/1305 ,  H01S3/1306 ,  H01S5/0014 ,  H01S5/0035 ,  H01S5/0427 ,  H01S5/0604 ,  H01S5/0617 ,  H01S5/06213 ,  H01S5/06255 ,  H01S5/068 ,  H01S5/06808 ,  H01S5/18311

Abstract: Technologies are generally described for implementing non-linear VCSEL equalization. In some examples, a rising edge tap parameter, a falling edge tap parameter, an equalization delay and a bias current may be used to equalize a data signal to be output from a VCSEL. A VCSEL model may be used to derive a VCSEL response to one or more isolated data pulses. The derived response may then be used to determine the rising and falling edge tap parameters and an equalization delay, based on a bias current value for the VCSEL and a data rate associated with the data signal. The data signal may then be adjusted based on the equalization delay and the rising and falling edge tap parameter and sent to the VCSEL for output. At the same time, the VCSEL may be biased with a bias current having the bias current value.

Abstract translation: 通常描述了用于实现非线性VCSEL均衡的技术。 在一些示例中，可以使用上升沿抽头参数，下降沿抽头参数，均衡延迟和偏置电流来均衡要从VCSEL输出的数据信号。 可以使用VCSEL模型来导出对一个或多个隔离数据脉冲的VCSEL响应。 然后，导出的响应可以用于基于VCSEL的偏置电流值和与数据信号相关联的数据速率来确定上升沿和下降沿抽头参数以及均衡延迟。 然后可以基于均衡延迟和上升沿和下降沿抽头参数来调整数据信号，并将其发送到VCSEL以进行输出。 同时，VCSEL可以偏置具有偏置电流值的偏置电流。

公开(公告)号：US09473115B2

公开(公告)日：2016-10-18

申请号：US14944925

申请日：2015-11-18

Applicant: CALIFORNIA INSTITUTE OF TECHNOLOGY

Inventor： Mayank Raj ,  Azita Emami

IPC: H03B27/00 ,  H03K3/03 ,  H03L7/099 ,  H03L7/24

CPC classification number: H03K3/0315 ,  H03B27/00 ,  H03B2201/038 ,  H03L7/0995 ,  H03L7/24

Abstract: Technologies are generally described for quadrature-based injection-locking of ring oscillators. In some examples, an external signal may be injected into a ring oscillator. Phase signals may be measured from within the ring oscillator and used to determine a mean quadrature error (MQE) that characterizes the difference in frequency between the external signal and the ring oscillator's natural frequency. A control signal may then be generated from the MQE and used to adjust the ring oscillator natural frequency to reduce the difference between the ring oscillator natural frequency and the external signal.

公开(公告)号：US09219486B2

公开(公告)日：2015-12-22

申请号：US14479269

申请日：2014-09-05

Applicant: California Institute of Technology

Inventor： Mayank Raj ,  Azita Emami

IPC: H03B27/00 ,  H03K3/03 ,  H03L7/099

CPC classification number: H03K3/0315 ,  H03B27/00 ,  H03B2201/038 ,  H03L7/0995 ,  H03L7/24

Abstract: Technologies are generally described for quadrature-based injection-locking of ring oscillators. In some examples, an external signal may be injected into a ring oscillator. Phase signals may be measured from within the ring oscillator and used to determine a mean quadrature error (MQE) that characterizes the difference in frequency between the external signal and the ring oscillator's natural frequency. A control signal may then be generated from the MQE and used to adjust the ring oscillator natural frequency to reduce the difference between the ring oscillator natural frequency and the external signal.

Abstract translation: 技术通常被描述为用于环形振荡器的正交注入锁定。 在一些示例中，外部信号可以被注入到环形振荡器中。 相位信号可以从环形振荡器内测量，并用于确定表征外部信号和环形振荡器固有频率之间的频率差的均方根误差（MQE）。 然后可以从MQE生成控制信号，并用于调整环形振荡器固有频率以减小环形振荡器固有频率与外部信号之间的差异。

公开(公告)号：US20150288144A1

公开(公告)日：2015-10-08

申请号：US14726406

申请日：2015-05-29

Applicant: California Institute of Technology

Inventor： Mayank Raj ,  Azita Emami

IPC: H01S5/183 ,  H01S5/0625 ,  H01S5/068 ,  H01S5/06 ,  H01S3/13

CPC classification number: H01S5/183 ,  H01S3/13 ,  H01S3/1305 ,  H01S3/1306 ,  H01S5/0014 ,  H01S5/0035 ,  H01S5/0427 ,  H01S5/0604 ,  H01S5/0617 ,  H01S5/06213 ,  H01S5/06255 ,  H01S5/068 ,  H01S5/06808 ,  H01S5/18311

Abstract: Technologies are generally described for implementing non-linear VCSEL equalization. In some examples, a rising edge tap parameter, a falling edge tap parameter, an equalization delay and a bias current may be used to equalize a data signal to be output from a VCSEL. A VCSEL model may be used to derive a VCSEL response to one or more isolated data pulses. The derived response may then be used to determine the rising and falling edge tap parameters and an equalization delay, based on a bias current value for the VCSEL and a data rate associated with the data signal. The data signal may then be adjusted based on the equalization delay and the rising and falling edge tap parameter and sent to the VCSEL for output. At the same time, the VCSEL may be biased with a bias current having the bias current value.

Abstract translation: 通常描述了用于实现非线性VCSEL均衡的技术。 在一些示例中，可以使用上升沿抽头参数，下降沿抽头参数，均衡延迟和偏置电流来均衡要从VCSEL输出的数据信号。 可以使用VCSEL模型来导出对一个或多个隔离数据脉冲的VCSEL响应。 然后，导出的响应可以用于基于VCSEL的偏置电流值和与数据信号相关联的数据速率来确定上升沿和下降沿抽头参数以及均衡延迟。 然后可以基于均衡延迟和上升沿和下降沿抽头参数来调整数据信号，并将其发送到VCSEL以进行输出。 同时，VCSEL可以偏置具有偏置电流值的偏置电流。

公开(公告)号：US20160079966A1

公开(公告)日：2016-03-17

申请号：US14944925

申请日：2015-11-18

Applicant: CALIFORNIA INSTITUTE OF TECHNOLOGY

Inventor： Mayank Raj ,  Azita Emami

IPC: H03K3/03

CPC classification number: H03K3/0315 ,  H03B27/00 ,  H03B2201/038 ,  H03L7/0995 ,  H03L7/24

Abstract: Technologies are generally described for quadrature-based injection-locking offing oscillators. In some examples, an external signal may be injected into a ring oscillator. Phase signals may be measured from within the ring oscillator and used to determine a mean quadrature error (MQE) that characterizes the difference in frequency between the external signal and the ring oscillator's natural frequency. A control signal may then be generated from the MQE and used to adjust the ring oscillator natural frequency to reduce the difference between the ring oscillator natural frequency and the external signal.

Abstract translation: 技术通常描述为基于正交的注射锁定振荡器。 在一些示例中，外部信号可以被注入到环形振荡器中。 相位信号可以从环形振荡器内测量，并用于确定表征外部信号和环形振荡器固有频率之间的频率差的均方根误差（MQE）。 然后可以从MQE生成控制信号，并用于调整环形振荡器固有频率以减小环形振荡器固有频率与外部信号之间的差异。

公开(公告)号：US20150137895A1

公开(公告)日：2015-05-21

申请号：US14479269

申请日：2014-09-05

Applicant: California Institute of Technology

Inventor： Mayank Raj ,  Azita Emami

IPC: H03L7/099

CPC classification number: H03K3/0315 ,  H03B27/00 ,  H03B2201/038 ,  H03L7/0995 ,  H03L7/24

Abstract: Technologies are generally described for quadrature-based injection-locking of ring oscillators. In some examples, an external signal may be injected into a ring oscillator. Phase signals may be measured from within the ring oscillator and used to determine a mean quadrature error (MQE) that characterizes the difference in frequency between the external signal and the ring oscillator's natural frequency. A control signal may then be generated from the MQE and used to adjust the ring oscillator natural frequency to reduce the difference between the ring oscillator natural frequency and the external signal.

Abstract translation: 技术通常被描述为用于环形振荡器的正交注入锁定。 在一些示例中，外部信号可以被注入到环形振荡器中。 相位信号可以从环形振荡器内测量，并用于确定表征外部信号和环形振荡器固有频率之间的频率差的均方根误差（MQE）。 然后可以从MQE生成控制信号，并用于调整环形振荡器固有频率以减小环形振荡器固有频率与外部信号之间的差异。