公开(公告)号：US07659754B2

公开(公告)日：2010-02-09

申请号：US11939439

申请日：2007-11-13

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： H03B1/00 ,  H03K3/00

CPC分类号： H03K17/687 ,  H03K17/04123 ,  H03K17/063 ,  H03K2217/0036

摘要： A power switching circuit in CMOS technology has a power MOS transistor and a driver stage. The power MOS transistor is operated at a higher supply voltage in excess of its maximum allowable gate-source voltage; and the driver stage of the level shifter is operated at a lower supply voltage substantially lower than the supply voltage for the power MOS transistor. The driver stage includes a pair of driver MOS transistors coupled in series between a higher supply voltage rail and a reference potential rail, and at an interconnection node coupled to the gate of the power MOS transistor. The gates of the driver MOS transistors are AC-coupled to drive signals of mutually opposite phase; and the gates of the driver MOS transistors are each connected to the higher voltage supply rail through a respective parallel connection of a first resistor and a second resistor connected in series with a non-linear component. The resistance value of the second resistor is substantially smaller than the resistance value of the first resistor.

摘要翻译： CMOS技术中的功率开关电路具有功率MOS晶体管和驱动级。 功率MOS晶体管在比其最大允许栅极 - 源极电压更高的电源电压下工作; 并且电平移位器的驱动器级在基本上低于功率MOS晶体管的电源电压的较低电源电压下操作。 驱动器级包括串联在较高电源电压轨和参考电位轨之间的一对驱动器MOS晶体管，以及耦合到功率MOS晶体管的栅极的互连节点。 驱动器MOS晶体管的栅极被AC耦合以驱动相反相位的信号; 并且驱动器MOS晶体管的栅极通过与非线性分量串联连接的第一电阻器和第二电阻器的相应并联连接而连接到较高电压源轨。 第二电阻器的电阻值显着小于第一电阻器的电阻值。

公开(公告)号：US20090167264A1

公开(公告)日：2009-07-02

申请号：US12235309

申请日：2008-09-22

申请人： Erich Bayer ,  Juergen Neuhaeusler ,  Stefan Reithmaier

发明人： Erich Bayer ,  Juergen Neuhaeusler ,  Stefan Reithmaier

IPC分类号： G05F1/585

CPC分类号： G09G3/3208 ,  G09G2330/028 ,  H02M3/156

摘要： A converter has a single inductor with a first terminal connectable to a first terminal of the supply input through a first power transistor and a second terminal connectable to a second terminal of the supply input through a second power transistor. A first rectifier element connects the first terminal of the inductor with a first output terminal, and a second rectifier element connects the second terminal of the inductor with a second output terminal. A resistive voltage divider is connected between the first and second output terminals. A control circuit uses an input from the voltage divider as a reference input voltage and provides an output current to the second terminal of the supply input in response to any voltage difference between the reference input voltage and the second terminal of the supply input. This provides a virtual common reference potential at the second terminal of the supply input, which is thus a common ground (GND) terminal. In the ON phase of both power transistors, the inductor is charged with current from the supply input. In the OFF phase (both power transistors are OFF), the energy stored in the inductor is supplied to both of the positive and the negative supply output through the rectifier elements, the output current in fact flowing almost exclusively between the positive and negative supply outputs. Thus, in the OFF phase, the inductor is entirely isolated from the supply input and the supply outputs are in no way affected by any transients or fluctuations in the supply input voltage.

摘要翻译： A转换器具有单个电感器，第一端子可通过第一功率晶体管连接到电源输入的第一端子，第二端子可通过第二功率晶体管连接到电源输入端的第二端子。 第一整流器元件将电感器的第一端子与第一输出端子连接，第二整流器元件将电感器的第二端子与第二输出端子连接。 电阻分压器连接在第一和第二输出端子之间。 控制电路使用来自分压器的输入作为参考输入电压，并且响应于参考输入电压和电源输入的第二端之间的任何电压差，向电源输入的第二端提供输出电流。 这在供电输入的第二端子处提供虚拟公共参考电位，因此是公共地（GND）端子。 在两个功率晶体管的ON阶段，电感器从电源输入端接入电流。 在OFF阶段（两个功率晶体管关闭），存储在电感器中的能量通过整流元件被提供给正电源和负电源两端，实际上输出电流几乎完全在正和负电源输出之间流动 。 因此，在OFF阶段，电感器与电源输入完全隔离，电源输出不受电源输入电压瞬变或波动的影响。

公开(公告)号：US07420357B2

公开(公告)日：2008-09-02

申请号：US11194359

申请日：2005-08-01

申请人： Erich Bayer

发明人： Erich Bayer

IPC分类号： G05F1/40

CPC分类号： H02M3/156

摘要： A hysteretic DC/DC converter is proposed that operates at a high switching frequency without producing undesired pulse bursts at the output. The converter has a converter power stage with a supply voltage input, a controlled voltage output and an enable input. A comparator has a reference voltage input, a feedback input and an output, and a gating circuit connected between the output of the comparator and the enabling input of the converter power stage. The gating circuit inhibits as a function of load requirements the propagation of enabling pulses from the output of the comparator to the enabling input of the converter power stage. By gating the output of the comparator in a way to separate the output from the enabling input of the converter power stage immediately after the start of each conversion pulse, the generation of further pulses immediately after each conversion pulse is prevented, thereby keeping the output voltage ripple low.

摘要翻译： 提出了一种迟滞的DC / DC转换器，其工​​作在高开关频率，而不会在输出端产生不需要的脉冲串。 该转换器具有电源电压输入，受控电压输出和使能输入的转换器功率级。 比较器具有参考电压输入，反馈输入和输出以及连接在比较器的输出和转换器功率级的使能输入之间的门控电路。 门控电路根据负载要求禁止使能脉冲从比较器的输出传播到转换器功率级的使能输入。 通过将每个转换脉冲开始之后的输出与转换器功率级的使能输入分开来比较比较器的输出，防止在每个转换脉冲之后立即产生另外的脉冲，从而保持输出电压 波纹低。

公开(公告)号：US20070236188A1

公开(公告)日：2007-10-11

申请号：US11695876

申请日：2007-04-03

申请人： Neil Gibson ,  Kevin Scoones ,  Erich Bayer

发明人： Neil Gibson ,  Kevin Scoones ,  Erich Bayer

IPC分类号： G05F1/613

CPC分类号： H02M3/1563

摘要： A self-oscillating DC-DC buck converter with zero hysteresis is described. The converter comprises a comparator with a supply input, a non-inverting input to which a reference voltage is applied, an inverting input to which a feedback signal is applied, and an output to which a filter network is connected. The feedback signal is derived from the filter network and the output voltage of the converter is determined by the reference voltage. Connecting a filter network with an inductor and a capacitor to the output of the comparator and deriving the feedback signal from the filter network, results in an output of the comparator which is a DC output with a superimposed ripple. The level of the DC output is controlled by the reference voltage applied to the non-inverting input of the comparator, and the inductor current develops the ripple in the equivalent series resistance of the load circuit connected to the comparator output. The ripple can be regarded as the ramp signal in a conventional DC-DC converter. Accordingly, the output voltage is regulated to follow the reference voltage, and the proposed topology is equivalent to a DC-DC buck converter.

摘要翻译： 描述了具有零滞后的自谐振DC-DC降压转换器。 该转换器包括具有电源输入的比较器，施加参考电压的非反相输入端，施加反馈信号的反相输入端和连接有滤波器网络的输出端。 反馈信号来自滤波器网络，转换器的输出电压由参考电压决定。 将滤波器网络与电感器和电容器连接到比较器的输出端，并从滤波器网络导出反馈信号，从而产生比较器的输出，该输出是具有叠加纹波的直流输出。 直流输出的电平由施加到比较器的非反相输入的参考电压控制，电感电流产生与比较器输出相连的负载电路的等效串联电阻的纹波。 在常规DC-DC转换器中，纹波可以被看作是斜坡信号。 因此，输出电压被调节为跟随参考电压，并且所提出的拓扑等效于DC-DC降压转换器。

公开(公告)号：US07129752B2

公开(公告)日：2006-10-31

申请号：US11042297

申请日：2005-01-24

申请人： Erich Bayer

发明人： Erich Bayer

IPC分类号： H03K19/0175

CPC分类号： H03K3/356113

摘要： An improved level shifter circuit with AC feed-forward is disclosed. The integrated circuit device includes a first circuit part biased from a lower voltage supply and a second circuit part biased from a higher voltage supply. One of the circuit parts has an RS flip-flop with two complementary signal outputs and the other one has a signal input and a first and a second switching transistor. The first and the second switching transistors each have a current channel DC coupled in series with a respective cascode-connected transistor which is connected to a respective one of the signal outputs. One of these outputs is coupled to the input through a first feed-forward AC series circuit of an inverter and a first coupling capacitor, and the other output is coupled to the input through a second feed-forward AC circuit including a second coupling capacitor.

摘要翻译： 公开了一种具有交流前馈的改进的电平移位电路。 集成电路器件包括从较低电压源偏置的第一电路部分和从较高电压源偏置的第二电路部分。 其中一个电路部分具有一个具有两个互补信号输出的RS触发器，另一个具有信号输入端和第一和第二开关晶体管。 第一和第二开关晶体管各自具有与连接到相应的一个信号输出的相应的共源共栅连接晶体管串联耦合的电流通道DC。 这些输出中的一个通过反相器和第一耦合电容器的第一前馈AC串联电路耦合到输入端，另一个输出端通过包括第二耦合电容器的第二前馈AC电路耦合到输入端。

公开(公告)号：US20060044174A1

公开(公告)日：2006-03-02

申请号：US11194359

申请日：2005-08-01

申请人： Erich Bayer

发明人： Erich Bayer

IPC分类号： H03M1/34

CPC分类号： H02M3/156

摘要： A hysteretic DC/DC converter is proposed that operates at a high switching frequency without producing undesired pulse bursts at the output. The converter has a converter power stage with a supply voltage input, a controlled voltage output and an enable input. A comparator has a reference voltage input, a feedback input and an output, and a gating circuit connected between the output of the comparator and the enabling input of the converter power stage. The gating circuit inhibits as a function of load requirements the propagation of enabling pulses from the output of the comparator to the enabling input of the converter power stage. By gating the output of the comparator in a way to separate the output from the enabling input of the converter power stage immediately after the start of each conversion pulse, the generation of further pulses immediately after each conversion pulse is prevented, thereby keeping the output voltage ripple low.

摘要翻译： 提出了一种迟滞的DC / DC转换器，其工​​作在高开关频率，而不会在输出端产生不需要的脉冲串。 该转换器具有电源电压输入，受控电压输出和使能输入的转换器功率级。 比较器具有参考电压输入，反馈输入和输出以及连接在比较器的输出和转换器功率级的使能输入之间的门控电路。 门控电路根据负载要求禁止使能脉冲从比较器的输出传播到转换器功率级的使能输入。 通过将每个转换脉冲开始之后的输出与转换器功率级的使能输入分开来比较比较器的输出，防止在每个转换脉冲之后立即产生另外的脉冲，从而保持输出电压 波纹低。

公开(公告)号：US5952869A

公开(公告)日：1999-09-14

申请号：US686850

申请日：1996-07-26

申请人： Frank Fattori ,  Walter Bucksch ,  Erich Bayer ,  Kevin Scoones

发明人： Frank Fattori ,  Walter Bucksch ,  Erich Bayer ,  Kevin Scoones

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H03F3/68 ,  H03K17/12 ,  H03K19/0175 ,  H03K17/62 ,  H03K17/693 ,  H03K17/76

CPC分类号： H03K17/122 ,  H01L2924/0002

摘要： A high power MOS transistor consists of a large number of sub-transistors (T1 to T6) connected in parallel. The gate electrodes of the sub-transistors (T1 to T6) can be driven individually via controllable switching elements (SW1 to SW6; SQ1 to SQ5).

摘要翻译： 高功率MOS晶体管由大量并联连接的子晶体管（T1至T6）组成。 子晶体管（T1至T6）的栅电极可以通过可控开关元件（SW1至SW6; SQ1至SQ5）单独驱动。

公开(公告)号：US5786931A

公开(公告)日：1998-07-28

申请号：US629379

申请日：1996-04-08

申请人： Peter Speckbacher ,  Georg Flatscher ,  Michael Allgauer ,  Erich Bayer ,  Erwin Spanner ,  Andreas Franz

发明人： Peter Speckbacher ,  Georg Flatscher ,  Michael Allgauer ,  Erich Bayer ,  Erwin Spanner ,  Andreas Franz

IPC分类号： G01B11/00 ,  G02B5/18 ,  G03F9/00 ,  G02B27/44 ,  G03H1/04

CPC分类号： G03F9/70 ,  G02B5/1857 ,  G02B5/1861 ,  Y10S359/90

摘要： The phase grating of the present invention includes a substrate with a reflective, continuous layer disposed thereon on which a structured spacer layer 3 of dielectric material is applied. To form a phase grating that can be used as a scale in photoelectric position measuring instruments, a further thin reflective surface layer is located solely on the reflective, continuous surfaces, parallel to the layer, of the structured spacer layer.

摘要翻译： 本发明的相位光栅包括具有设置在其上的反射连续层的衬底，其上施加有介电材料的结构化隔离层3。 为了形成可用作光电位置测量仪器中的刻度的相位光栅，另外薄的反射表面层仅位于结构化间隔层的平行于层的反射连续表面上。

公开(公告)号：US5329247A

公开(公告)日：1994-07-12

申请号：US949

申请日：1993-01-05

申请人： Erich Bayer

发明人： Erich Bayer

IPC分类号： G05F3/26 ,  H03K17/0416 ,  H03K17/10 ,  H03F3/16

CPC分类号： H03K17/04163 ,  G05F3/262 ,  H03K17/102 ,  H01L2924/0002

摘要： The present invention relates to a switchable MOS current mirror having an input and an output current branch (1, 2), a plurality of first and second MOS-field-effect transistors, and a circuit section containing a third and a fourth MOS field effect transistor (Q3, Q4). The gate electrodes of the first MOS field-effect transistors are connected respectively to a gate electrode of a second MOS field-effect transistor and to the respective drain electrodes of the first MOS field-effect transistors. The gate electrode of the third and the gate electrode of the fourth MOS field-effect transistor are connected to a control terminal (S) and to the operating voltage (Vb) respectively. To ensure as constant an input current as possible in the first current branch and as clean an output current signal (Ia) as possible with a short rise time, according to the invention capacitors (C1, C2) are provided for furnishing charge currents and are connected between ground or the operating voltage terminal and the connection points of the gate electrodes connected to each other in pairs. Consequently, the gate currents necessary for rendering the second circuit conductive are not branched from the input current (Ie) but from the capacitors.

摘要翻译： 本发明涉及具有输入和输出电流分支（1,2），多个第一和第二MOS场效应晶体管以及包含第三和第四MOS场效应的电路部分的可切换MOS电流镜 晶体管（Q3，Q4）。 第一MOS场效应晶体管的栅电极分别连接到第二MOS场效应晶体管的栅极和第一MOS场效应晶体管的各个漏电极。 第三MOS场效应晶体管的第三栅极和第四MOS场效应晶体管的栅电极分别连接到控制端（S）和工作电压（Vb）。 为了确保在第一电流分支中尽可能恒定输入电流，并且根据本发明，尽可能地清洁输出电流信号（Ia），根据本发明，电容器（C1，C2）用于提供充电电流，并且是 连接在接地或工作电压端子和栅电极的成对连接的连接点之间。 因此，使第二电路导通所需的栅极电流不从输入电流（Ie）分支，而是从电容器分支。

公开(公告)号：US07282895B2

公开(公告)日：2007-10-16

申请号：US11199326

申请日：2005-08-08

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： G05F1/00 ,  G05F1/613

CPC分类号： G05F3/262 ,  H02M2001/0045

摘要： A DC/DC converter has a linear voltage regulator for reducing or eliminating the output ripple of the converter with a minimum loss of efficiency. The converter comprises a converter stage with a supply voltage input, a converted voltage output and a control input, a regulator stage having an input connected to the converted voltage output of the converter stage and an output connected to a load, and a tracking circuit with inputs for a voltage at the converted voltage output of the converter stage, a voltage at the output of the regulator stage and a load sense current, and an output connected to the control input of the converter stage. The tracking circuit controls the converter stage so as to increase the converted voltage with an increasing load sense current and vice versa. The output voltage of the converter is always just sufficient to eliminate the ripple without having to operate the regulator's pass transistor in its linear range.

摘要翻译： DC / DC转换器具有线性稳压器，以最小的效率损失减少或消除转换器的输出纹波。 转换器包括具有电源电压输入的转换器级，转换的电压输出和控制输入，具有连接到转换器级的转换的电压输出的输入的调节器级和连接到负载的输出，以及跟踪电路， 在转换器级的转换电压输出端的电压输入，调节器级的输出端的电压和负载感测电流，以及连接到转换器级的控制输入的输出。 跟踪电路控制转换器级，以便随着负载感测电流的增加而增加转换的电压，反之亦然。 转换器的输出电压总是足以消除纹波，而不必在其线性范围内操作稳压器的传输晶体管。