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公开(公告)号：US09093130B2
公开(公告)日：2015-07-28
申请号：US13474270
申请日：2012-05-17
摘要： A sense amplifier includes a first transistor, a second transistor, an output circuit, and a shielding circuit. The first transistor has a gate bias established by a cell current, and the second transistor has a gate bias established by a reference current. The output circuit is coupled to the first and the second transistor. The shielding circuit is located between the second transistor and the output circuit.
摘要翻译： 读出放大器包括第一晶体管，第二晶体管，输出电路和屏蔽电路。 第一晶体管具有由单元电流建立的栅极偏置，并且第二晶体管具有由参考电流建立的栅极偏置。 输出电路耦合到第一和第二晶体管。 屏蔽电路位于第二晶体管和输出电路之间。
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公开(公告)号：US09036410B2
公开(公告)日：2015-05-19
申请号：US13013592
申请日：2011-01-25
CPC分类号： G11C8/10
摘要： A Y-decoder includes a selection unit and a Y-MUX. The selection unit is coupled to the memory array for selecting the column lines. The Y-MUX is coupled to the selection unit for supplying a voltage to the selected column line. The Y-MUX includes a first switch, a second switch, a third switch and a fourth switch coupled in parallel. The first switch and the second switch are respectively for receiving a first shielding voltage and a second shielding voltage. The third switch and the fourth switch are respectively for receiving a first sensing voltage and a second sensing voltage.
摘要翻译： Y解码器包括选择单元和Y-MUX。 选择单元耦合到用于选择列线的存储器阵列。 Y-MUX耦合到选择单元，用于向所选择的列线提供电压。 Y-MUX包括并联耦合的第一开关，第二开关，第三开关和第四开关。 第一开关和第二开关分别用于接收第一屏蔽电压和第二屏蔽电压。 第三开关和第四开关分别用于接收第一感测电压和第二感测电压。
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公开(公告)号：US20130286744A1
公开(公告)日：2013-10-31
申请号：US13458485
申请日：2012-04-27
摘要： A bit line bias circuit of a memory architecture includes a varying voltage drop. In some embodiments, the voltage drop can depend on the threshold voltage of the memory cell selected to be read, or on the sense current flowing through the memory cell selected to be read.
摘要翻译： 存储器架构的位线偏置电路包括变化的电压降。 在一些实施例中，电压降可以取决于选择要读取的存储器单元的阈值电压，或取决于流经选择读取的存储器单元的检测电流。
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公开(公告)号：US20130155777A1
公开(公告)日：2013-06-20
申请号：US13328010
申请日：2011-12-16
摘要： The configurations of sense amplifier and methods thereof are provided. The proposed sense amplifier includes a switch circuit having a main control switch, a sensing switch and a holding switch, wherein the three switches have a first bias, a second bias and a third bias respectively, and an auxiliary control switch electrically connected to the holding switch to control an operation of the holding switch.
摘要翻译： 提供了读出放大器的结构及其方法。 所提出的感测放大器包括具有主控开关，感测开关和保持开关的开关电路，其中三个开关分别具有第一偏压，第二偏压和第三偏压，以及辅助控制开关，电连接到保持 切换到控制保持开关的操作。
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公开(公告)号：US20130100758A1
公开(公告)日：2013-04-25
申请号：US13713883
申请日：2012-12-13
IPC分类号： G11C8/08
CPC分类号： G11C8/08
摘要： A memory circuit with a word line driver and control circuitry is disclosed. The word line driver receives a first voltage reference signal, a second voltage reference signal, and an input signal. The word line driver has an output coupled to a word line. The control circuitry is configured to deselect the word line by applying the input signal to the input of the word line driver. For example, in a program operation the word line is deselected to indicate that the word line is not programmed, and another word line is selected to be programmed. During an operation in which the word line is deselected and another word line is selected, the word line discharges through both of a first p-type transistor and a first n-type transistor of the word line driver.
摘要翻译： 公开了具有字线驱动器和控制电路的存储器电路。 字线驱动器接收第一电压参考信号，第二电压参考信号和输入信号。 字线驱动器具有耦合到字线的输出。 控制电路被配置为通过将输入信号施加到字线驱动器的输入来取消选择字线。 例如，在程序操作中，字线被取消选择以指示字线未被编程，并且另一个字线被选择来被编程。 在取消选择字线并选择另一个字线的操作期间，字线通过字线驱动器的第一p型晶体管和第一n型晶体管而放电。
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公开(公告)号：US08325536B2
公开(公告)日：2012-12-04
申请号：US13277131
申请日：2011-10-19
IPC分类号： G11C13/06
CPC分类号： G11C7/067 , G11C7/062 , G11C7/14 , G11C16/28 , G11C2207/063
摘要： Source-side sensing techniques described herein determine the data value stored in a memory cell based on the difference in current between the read current from the source terminal of the memory cell and a sink current drawn from the read current. The sink current is drawn in response to the magnitude of a reference current provided by a reference current source such as a reference cell.
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公开(公告)号：US08261120B2
公开(公告)日：2012-09-04
申请号：US12631705
申请日：2009-12-04
CPC分类号： H03K19/018528 , G05F3/02 , G06F1/04 , G06F1/08 , G06F1/10 , G06F1/12 , H03K19/0175 , H03L5/00
摘要： The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more of the variations in temperature, ground noise, and power noise.
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公开(公告)号：US08213234B2
公开(公告)日：2012-07-03
申请号：US12833523
申请日：2010-07-09
IPC分类号： G11C16/04
CPC分类号： G11C16/26 , G11C7/062 , G11C7/067 , G11C2207/063
摘要： Source-side sensing techniques described herein determine the data value stored in a memory cell based on the difference in current between the read current from the source terminal of the memory cell and a sink current drawn from the read current. The sink current is drawn in response to the magnitude of a reference current provided by a reference current source such as a reference cell.
摘要翻译： 基于来自存储单元的源极端子的读取电流与从读出电流抽取的吸收电流之间的电流差，确定存储单元中存储的源极侧感测技术。 吸收电流响应于由参考电流源（例如参考单元）提供的参考电流的大小来绘制。
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公开(公告)号：US20110176378A1
公开(公告)日：2011-07-21
申请号：US12769502
申请日：2010-04-28
CPC分类号： G11C7/12 , G11C7/06 , G11C16/24 , G11C16/26 , Y10T29/49117
摘要： A memory integrated circuit has an array of nonvolatile memory cells, bit lines accessing the array of nonvolatile memory cells, and bit line discharge circuitry. The bit lines have multiple discharge paths for a bit line at a same time, during a program operation.
摘要翻译： 存储器集成电路具有非易失性存储单元的阵列，访问非易失性存储单元阵列的位线和位线放电电路。 在编程操作期间，位线在同一时间对于位线具有多个放电路径。
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公开(公告)号：US20110138216A1
公开(公告)日：2011-06-09
申请号：US12631693
申请日：2009-12-04
IPC分类号： G06F1/04
CPC分类号： G06F1/04 , H03K19/00384
摘要： The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more of the variations in temperature, ground noise, and power noise.
摘要翻译： 集成电路的时钟电路具有诸如温度，接地噪声和功率噪声的变化。 改进的时钟集成电路的各个方面解决了温度，地面噪声和功率噪声中的一个或多个变化。
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