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公开(公告)号：US09147480B2
公开(公告)日：2015-09-29
申请号：US13328010
申请日：2011-12-16
摘要： The configurations of sense amplifier and methods thereof are provided. The proposed sense amplifier includes a switch circuit having a main control switch, a sensing switch and a holding switch, wherein the three switches have a first bias, a second bias and a third bias respectively, and an auxiliary control switch electrically connected to the holding switch to control an operation of the holding switch.
摘要翻译： 提供了读出放大器的结构及其方法。 所提出的感测放大器包括具有主控开关，感测开关和保持开关的开关电路，其中三个开关分别具有第一偏压，第二偏压和第三偏压，以及辅助控制开关，电连接到保持 切换到控制保持开关的操作。
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公开(公告)号：US08780641B2
公开(公告)日：2014-07-15
申请号：US13402327
申请日：2012-02-22
IPC分类号： G11C11/34
CPC分类号： G11C11/5642 , G11C16/00 , G11C29/021 , G11C29/028 , G11C29/42 , G11C2211/5634
摘要： A memory array is characterized by a threshold definition, which includes threshold voltage ranges representing data values stored by a part of the memory array, and a set of sense windows separating the threshold voltage ranges. The threshold definition is varied, responsive to at least one of program operations and erase operations. Such operations change a distribution of the data values stored in the memory group.
摘要翻译： 存储器阵列的特征在于阈值定义，其包括表示由存储器阵列的一部分存储的数据值的阈值电压范围，以及分离阈值电压范围的一组感测窗口。 响应于程序操作和擦除操作中的至少一个，阈值定义是变化的。 这样的操作改变存储在存储器组中的数据值的分布。
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3.发明申请Method and Apparatus for Adjusting Drain Bias of A Memory Cell With Addressed and Neighbor Bits 有权用于调整具有上位和相邻位的存储单元的漏极偏置的方法和装置公开(公告)号：US20130208552A1
公开(公告)日：2013-08-15
申请号：US13372135
申请日：2012-02-13
IPC分类号： G11C7/00
CPC分类号： G11C7/00 , G11C11/5628 , G11C11/5642 , G11C11/5671 , G11C2211/5621
摘要： The storage layer such as a nitride layer of a nonvolatile memory cell has two storage parts storing separately addressable data, typically respectively proximate to the source terminal and the drain terminal. The applied drain voltage while sensing the data of one of the storage parts depends on the data stored at the other storage part. If the data stored at the other storage part is represented by a threshold voltage exceeding a minimum threshold voltage, then the applied drain voltage is raised. This technology is useful in read operations and program verify operations to widen the threshold voltage window.
摘要翻译： 诸如非易失性存储单元的氮化物层的存储层具有存储单独可寻址数据的两个存储部分，通常分别靠近源极端子和漏极端子。 在感测一个存储部件的数据时所施加的漏极电压取决于存储在另一个存储部分的数据。 如果存储在另一个存储部分的数据由超过最小阈值电压的阈值电压表示，则所施加的漏极电压升高。 该技术在读取操作和程序验证操作中有助于拓宽阈值电压窗口。
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4.发明授权Memory Program Discharge Circuit of bit lines with multiple discharge paths 有权具有多个放电路径的位线的存储器程序放电电路公开(公告)号：US08358550B2
公开(公告)日：2013-01-22
申请号：US12769502
申请日：2010-04-28
IPC分类号： G11C7/00
CPC分类号： G11C7/12 , G11C7/06 , G11C16/24 , G11C16/26 , Y10T29/49117
摘要： A memory integrated circuit has an array of nonvolatile memory cells, bit lines accessing the array of nonvolatile memory cells, and bit line discharge circuitry. The bit lines have multiple discharge paths for a bit line at a same time, during a program operation.
摘要翻译： 存储器集成电路具有非易失性存储单元的阵列，访问非易失性存储单元阵列的位线和位线放电电路。 在编程操作期间，位线在同一时间对于位线具有多个放电路径。
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公开(公告)号：US08164953B2
公开(公告)日：2012-04-24
申请号：US13041642
申请日：2011-03-07
IPC分类号： G11C16/04
CPC分类号： G11C29/02 , G11C8/08 , G11C29/021 , G11C29/028 , G11C2029/1202
摘要： A memory and an operating method thereof are provided therein. When searching a boundary of a threshold voltage distribution of the memory, data errors resulted from tail bits of the memory would be corrected. Therefore, a sensing window could be broader, and the boundary of the threshold voltage distribution could be determined precisely.
摘要翻译： 在其中提供存储器及其操作方法。 当搜索存储器的阈值电压分布的边界时，将校正由存储器的尾部位产生的数据错误。 因此，感测窗口可以更宽，并且可以精确地确定阈值电压分布的边界。
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公开(公告)号：US07961027B1
公开(公告)日：2011-06-14
申请号：US12631661
申请日：2009-12-04
IPC分类号： G06F1/04
CPC分类号： H03K3/13 , H03K3/011 , H03K3/0231 , H03K3/0322
摘要： The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more of the variations in temperature, ground noise, and power noise.
摘要翻译： 集成电路的时钟电路具有诸如温度，接地噪声和功率噪声的变化。 改进的时钟集成电路的各个方面解决了温度，地面噪声和功率噪声中的一个或多个变化。
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公开(公告)号：US09449666B2
公开(公告)日：2016-09-20
申请号：US13713829
申请日：2012-12-13
摘要： A memory circuit with a word line driver and control circuitry is disclosed. The plurality of word line drivers are coupled to a plurality of word lines. Word line drivers include a CMOS inverter, which can have an input and an output, and a p-type transistor and an n-type transistor. The output of the CMOS inverter is coupled to one of the plurality of word lines. The control circuitry has multiple modes, including at least a first mode to discharge a particular word line of the plurality of word lines via a first discharge path such as at least a first transistor type of the CMOS inverter; and a second mode to discharge the particular word line of the plurality of word lines via a second discharge path such as at least the a second transistor type of the CMOS inverter.
摘要翻译： 公开了具有字线驱动器和控制电路的存储器电路。 多个字线驱动器耦合到多个字线。 字线驱动器包括可以具有输入和输出的CMOS反相器，以及p型晶体管和n型晶体管。 CMOS反相器的输出耦合到多个字线之一。 控制电路具有多种模式，包括至少第一模式，以经由诸如至少第一晶体管类型的CMOS反相器的第一放电路径放电多个字线的特定字线; 以及第二模式，用于经由诸如至少第二晶体管类型的CMOS反相器的第二放电路径放电多个字线的特定字线。
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公开(公告)号：US20130215687A1
公开(公告)日：2013-08-22
申请号：US13402327
申请日：2012-02-22
CPC分类号： G11C11/5642 , G11C16/00 , G11C29/021 , G11C29/028 , G11C29/42 , G11C2211/5634
摘要： A memory array is characterized by a threshold definition, which includes threshold voltage ranges representing data values stored by a part of the memory array, and a set of sense windows separating the threshold voltage ranges. The threshold definition is varied, responsive to at least one of program operations and erase operations. Such operations change a distribution of the data values stored in the memory group.
摘要翻译： 存储器阵列的特征在于阈值定义，其包括表示由存储器阵列的一部分存储的数据值的阈值电压范围，以及分离阈值电压范围的一组感测窗口。 响应于程序操作和擦除操作中的至少一个，阈值定义是变化的。 这样的操作改变存储在存储器组中的数据值的分布。
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公开(公告)号：US20130058181A1
公开(公告)日：2013-03-07
申请号：US13227249
申请日：2011-09-07
IPC分类号： G11C7/04
CPC分类号： G11C7/04 , G11C7/14 , G11C11/5642 , G11C2211/5634
摘要： A memory element in which the temperature coefficient of a memory cell substantially matches the temperature coefficient of a reference cell and tuning either the temperature coefficient of a memory cell to substantially match the temperature coefficient of the reference cell provides for improved precision of sensing or reading memory element states, particularly so as to minimize the affect of temperature variations on reading and sensing states.
摘要翻译： 一种存储元件，其中存储单元的温度系数基本上与参考单元的温度系数相匹配，并且调节存储单元的温度系数以与参考单元的温度系数基本一致，提供了读取或读取存储器的精度提高 特别是为了最小化温度变化对读取和感测状态的影响。
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公开(公告)号：US20120224443A1
公开(公告)日：2012-09-06
申请号：US13474270
申请日：2012-05-17
摘要： A sense amplifier includes a first transistor, a second transistor, an output circuit, and a shielding circuit. The first transistor has a gate bias established by a cell current, and the second transistor has a gate bias established by a reference current. The output circuit is coupled to the first and the second transistor. The shielding circuit is located between the second transistor and the output circuit.
摘要翻译： 读出放大器包括第一晶体管，第二晶体管，输出电路和屏蔽电路。 第一晶体管具有由单元电流建立的栅极偏置，并且第二晶体管具有由参考电流建立的栅极偏置。 输出电路耦合到第一和第二晶体管。 屏蔽电路位于第二晶体管和输出电路之间。
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