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公开(公告)号:US11437470B2
公开(公告)日:2022-09-06
申请号:US16415365
申请日:2019-05-17
Applicant: Infineon Technologies AG
Inventor: Thomas Basler , Rudolf Elpelt , Hans-Joachim Schulze
Abstract: The disclosure relates to a semiconductor component having an SiC semiconductor body and a first load terminal on a first surface of the SiC semiconductor body. A second load terminal is formed on a second surface of the SiC semiconductor body opposite the first surface. The semiconductor component has a drift zone of a first conductivity type in the SiC semiconductor body and a first semiconductor area of a second conductivity type which is electrically connected to the first load terminal. A pn junction between the drift zone and the first semiconductor area defines a voltage blocking strength of the semiconductor component.
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公开(公告)号:US20220199765A1
公开(公告)日:2022-06-23
申请号:US17128745
申请日:2020-12-21
Applicant: Infineon Technologies AG
Inventor: Michael Hell , Rudolf Elpelt , Caspar Leendertz
Abstract: A semiconductor device includes: a SiC substrate; a device structure in or on the SiC substrate and subject to an electric field during operation of the semiconductor device; a current-conduction region of a first conductivity type in the SiC substrate below and adjoining the device structure; and a shielding region of a second conductivity type laterally adjacent to the current-conduction region and configured to at least partly shield the device structure from the electric field. The shielding region has a higher net doping concentration than the current-conduction region, and has a length (L) measured from a first position which corresponds to a bottom of the device structure to a second position which corresponds to a bottom of the shielding region. The current-conduction region has a width (d) measured between opposing lateral sides of the current-conduction region, and L/d is in a range of 1 to 10.
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公开(公告)号:US20220059687A1
公开(公告)日:2022-02-24
申请号:US16998484
申请日:2020-08-20
Applicant: Infineon Technologies AG
Inventor: Michael Hell , Rudolf Elpelt , Caspar Leendertz
IPC: H01L29/78 , H01L29/872 , H01L29/66 , H01L29/16
Abstract: According to an embodiment of a semiconductor device, the device includes: a plurality of device cells formed in a semiconductor substrate, each device cell including a transistor structure and a Schottky diode structure; and a superjunction structure that includes alternating regions of a first conductivity type and of a second conductivity type formed in the semiconductor substrate. For each transistor structure, a channel region of the transistor structure and a Schottky metal region of an adjacent one of the Schottky diode structures are interconnected by semiconductor material of the first conductivity type without interruption by any of the regions of the second conductivity type of the superjunction structure, the semiconductor material of the first conductivity type including one or more of the regions of the first conductivity type of the superjunction structure.
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公开(公告)号:US20210050421A1
公开(公告)日:2021-02-18
申请号:US16986338
申请日:2020-08-06
Applicant: Infineon Technologies AG
Inventor: Caspar Leendertz , Thomas Basler , Paul Ellinghaus , Rudolf Elpelt , Michael Hell , Jens Peter Konrath , Shiqin Niu , Dethard Peters , Konrad Schraml , Bernd Leonhard Zippelius
IPC: H01L29/16 , H01L29/78 , H01L29/423 , H01L29/10
Abstract: A silicon carbide device includes a stripe-shaped trench gate structure extending from a first surface into a silicon carbide body. The gate structure has a gate length along a lateral first direction. A bottom surface and an active first gate sidewall of the gate structure are connected via a first bottom edge of the gate structure. The silicon carbide device further includes at least one source region of a first conductivity type. A shielding region of a second conductivity type is in contact with the first bottom edge of the gate structure across at least 20% of the gate length.
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公开(公告)号:US10861964B2
公开(公告)日:2020-12-08
申请号:US16171605
申请日:2018-10-26
Applicant: Infineon Technologies AG
Inventor: Roland Rupp , Rudolf Elpelt , Reinhold Schoerner , Larissa Wehrhahn-Kilian , Bernd Zippelius
IPC: H01L29/78 , H01L29/66 , H01L29/06 , H01L29/16 , H01L29/861 , H01L29/10 , H01L21/308 , H01L21/04 , H01L29/417 , H01L29/739 , H01L29/808
Abstract: A semiconductor device includes a drift zone formed in a semiconductor portion. In a transition section of the semiconductor portion a vertical extension of the semiconductor portion decreases from a first vertical extension to a second vertical extension. A junction termination zone of a conductivity type complementary to a conductivity type of the drift zone is formed between a first surface of the semiconductor portion and the drift zone and includes a tapering portion in the transition section. In the tapering portion a vertical extension of the junction termination zone decreases from a maximum vertical extension to zero within a lateral width of at least twice the maximum vertical extension.
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公开(公告)号:US10580878B1
公开(公告)日:2020-03-03
申请号:US16105742
申请日:2018-08-20
Applicant: Infineon Technologies AG
Inventor: Ravi Keshav Joshi , Rudolf Elpelt , Romain Esteve
Abstract: A SiC device with a doped buried region is provided. The doped buried region may be formed by: forming a first trench which extends into a first side of a SiC epitaxial layer of a first conductivity type, the first trench terminating at a first depth in the SiC epitaxial layer; at least partly filling the first trench with an epitaxial material of a second conductivity type opposite the first conductivity type; forming a second trench which extends into the first side of the SiC epitaxial layer so that the second trench overlaps the first trench, the second trench terminates at a second depth in the SiC epitaxial layer which is less than the first depth, and the epitaxial material in the first trench laterally extends below a bottom of the second trench; and forming a gate electrode in the second trench and electrically insulated from the SiC epitaxial layer.
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公开(公告)号:US20200058760A1
公开(公告)日:2020-02-20
申请号:US16105742
申请日:2018-08-20
Applicant: Infineon Technologies AG
Inventor: Ravi Keshav Joshi , Rudolf Elpelt , Romain Esteve
Abstract: A SiC device with a doped buried region is provided. The doped buried region may be formed by: forming a first trench which extends into a first side of a SiC epitaxial layer of a first conductivity type, the first trench terminating at a first depth in the SiC epitaxial layer; at least partly filling the first trench with an epitaxial material of a second conductivity type opposite the first conductivity type; forming a second trench which extends into the first side of the SiC epitaxial layer so that the second trench overlaps the first trench, the second trench terminates at a second depth in the SiC epitaxial layer which is less than the first depth, and the epitaxial material in the first trench laterally extends below a bottom of the second trench; and forming a gate electrode in the second trench and electrically insulated from the SiC epitaxial layer.
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38.
公开(公告)号:US20190067416A1
公开(公告)日:2019-02-28
申请号:US16169671
申请日:2018-10-24
Applicant: Infineon Technologies AG
Inventor: Anton Mauder , Rudolf Elpelt , Dethard Peters
Abstract: An embodiment of a semiconductor device includes a SiC semiconductor body region having a body region of a first conductivity type, a drift zone of a second conductivity type, and a compensation structure of the first conductivity type. The compensation structure and a drift zone section of the drift zone form a super junction structure. The compensation structure adjoins the body region and is positioned entirely below the body region in a vertical direction perpendicular to a surface of the SiC semiconductor body. The compensation structure includes a first compensation sub-structure and a second compensation sub-structure. The first compensation sub-structure and the second compensation sub-structure are arranged above one another in the vertical direction. A width of the compensation structure changes along the vertical direction.
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公开(公告)号:US10115791B2
公开(公告)日:2018-10-30
申请号:US15649870
申请日:2017-07-14
Applicant: Infineon Technologies AG
Inventor: Anton Mauder , Rudolf Elpelt , Dethard Peters
IPC: H01L29/66 , H01L29/06 , H01L29/423 , H01L29/16 , H01L29/78
Abstract: An embodiment of a semiconductor device includes a body region of a first conductivity type in a SiC semiconductor body of a second conductivity type. A super junction structure is in the SiC semiconductor body, and includes a drift zone section being of the second conductivity type and a compensation structure of the first conductivity type. The compensation structure adjoins the body region and includes compensation sub-structures consecutively arranged along a vertical direction perpendicular to a surface of the SiC semiconductor body. The compensation sub-structures include a first compensation sub-structure and a second compensation sub-structure. A resistance of the second compensation sub-structure between opposite ends of the second compensation sub-structure along the vertical direction is at least five times larger than a resistance of the first compensation sub-structure between opposite ends of the first compensation sub-structure along the vertical direction.
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公开(公告)号:US09412808B2
公开(公告)日:2016-08-09
申请号:US14644607
申请日:2015-03-11
Applicant: Infineon Technologies AG
Inventor: Hans-Joachim Schulze , Christian Hecht , Roland Rupp , Rudolf Elpelt
IPC: H01L21/00 , H01L29/06 , H01L29/16 , H01L21/04 , H01L29/872 , H01L29/66 , H01L21/265
CPC classification number: H01L29/0623 , H01L21/046 , H01L21/2652 , H01L29/1608 , H01L29/6606 , H01L29/872
Abstract: A silicon carbide device includes an epitaxial silicon carbide layer including a first conductivity type and a buried lateral silicon carbide edge termination region located within the epitaxial silicon carbide layer including a second conductivity type. The buried lateral silicon carbide edge termination region is covered by a silicon carbide surface layer including the first conductivity type.
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