公开(公告)号：US20220285294A1

公开(公告)日：2022-09-08

申请号：US17495821

申请日：2021-10-07

Applicant: Innolux Corporation

Inventor： Yeong-E Chen ,  Wei-Hsuan Chen ,  Chun-Yuan Huang

IPC: H01L23/64 ,  H01L23/498 ,  H01L49/02

Abstract: An embodiment of the disclosure provides a package device including a redistribution layer, an integrated passive device layer, a first port, and a second port. The integrated passive device layer contacts the redistribution layer. The integrated passive device layer has at least one capacitor. The at least one capacitor includes a first capacitor and a second capacitor. The first port is electrically connected to the first capacitor and the second capacitor. The second port is provided opposite to the first port. The second port is electrically connected to the first capacitor and the second capacitor. The first port and the second port have the same resistance.

公开(公告)号：US11378618B2

公开(公告)日：2022-07-05

申请号：US16861230

申请日：2020-04-29

Applicant: Innolux Corporation

Inventor： Yeong-E Chen

IPC: H01L21/67 ,  G01R31/28 ,  H01L21/768 ,  H01L23/00

Abstract: A method for manufacturing an electronic device includes the following steps. A substrate including a main region and a peripheral region is provided. A seed layer is formed on the substrate. A circuit structure layer is formed on the seed layer, and the circuit structure layer has a plurality of chip connection structures disposed on the main region and a plurality of test circuit structures disposed on the peripheral region. The chip connection structures and the test circuit structures are physically separated from each other, and the chip connection structures and the test circuit structures are electrically connected through the seed layer. A circuit test process is performed and includes applying a predetermined voltage to the test circuit structures to test the chip connection structures. A test result is obtained to determine whether a chip is electrically connected to the chip connection structures.

公开(公告)号：US20220181189A1

公开(公告)日：2022-06-09

申请号：US17520599

申请日：2021-11-05

Applicant: Innolux Corporation

Inventor： Cheng-Chi Wang ,  Wen-Hsiang Liao ,  Yeong-E Chen ,  Hung-Sheng Chou ,  Cheng-En Cheng

IPC: H01L21/683 ,  H01L21/48

Abstract: A manufacturing method of a semiconductor package is provided. The manufacturing method includes the following. A plurality of semiconductor components are provided. Each semiconductor component has at least one conductive bump. A substrate is provided. The substrate has a plurality of conductive pads. A transfer device is provided. The transfer device transfers the semiconductor components onto the substrate. A heating device is provided. The heating device heats or pressurizes at least two semiconductor components. During transferring of the semiconductor components to the substrate, the at least one conductive bump of each semiconductor component is docked to a corresponding one of the conductive pads.

公开(公告)号：US20210335764A1

公开(公告)日：2021-10-28

申请号：US17083318

申请日：2020-10-29

Applicant: Innolux Corporation

Inventor： Yeong-E Chen

IPC: H01L25/16 ,  H01L25/04 ,  H01L31/02 ,  H01L31/18 ,  H01L25/075 ,  H01L33/62 ,  H01L23/538

Abstract: An electronic device and a fabrication method thereof are provided. The electronic device includes a circuit structure layer, a package structure, an electronic element, and a plurality of function elements. The circuit structure layer has a first side and a second side opposite to the first side. The package structure is disposed on the first side of the circuit structure layer. The electronic element is embedded or encapsulated in the package structure. The function elements are disposed on the second side of the circuit structure layer. The function elements are electrically connected to the electronic element through the circuit structure layer. The electronic device provided by the disclosure exhibits borderless design or has a large function region.