公开(公告)号：US20170285949A1

公开(公告)日：2017-10-05

申请号：US15089503

申请日：2016-04-02

Applicant: Intel Corporation

Inventor： Sanjeev Trika ,  Kshitij Doshi

IPC: G06F3/06 ,  G06F12/06

CPC classification number: G06F3/0604 ,  G06F3/0659 ,  G06F3/0673 ,  G06F12/02 ,  G06F12/06 ,  G06F12/10 ,  G06F12/126 ,  G06F17/30 ,  G06F17/30979 ,  G11C15/00 ,  Y02D10/13

Abstract: Technology for an apparatus is described. The apparatus can include a memory and a storage controller. The storage controller can be configured to receive a search command with one or more parameters that instructs the storage controller to search for a data pattern in data stored in the memory. The storage controller can be configured to search the data stored in the memory for the data pattern according to the one or more parameters included in the search command. The storage controller can be configured to locally search the data in the memory for the data pattern without transferring the data to a processor to perform the search.

公开(公告)号：US20210342103A1

公开(公告)日：2021-11-04

申请号：US17234157

申请日：2021-04-19

Applicant: Intel Corporation

Inventor： Jawad Basit Khan ,  Peng Li ,  Sanjeev Trika

IPC: G06F3/06 ,  G06F13/38 ,  G06F9/34

Abstract: In one embodiment, a storage device comprises non-volatile storage media; a controller to receive, from a host, an object definition command that identifies a first data object and a second data object and a transformation to apply to the first data object and the second data object to generate a first transformed object and store the first transformed object in the non-volatile storage media; and a transformation engine to apply the transformation to the first data object and the second data object.

公开(公告)号：US11003479B2

公开(公告)日：2021-05-11

申请号：US16398017

申请日：2019-04-29

Applicant: Intel Corporation

Inventor： Sanjeev Trika ,  Bishwajit Dutta

IPC: G06F9/455 ,  G06F9/50 ,  G06F9/445

Abstract: Techniques and mechanisms for communicating compiled software instructions via a network, wherein the compiled instructions are to execute a kernel process of a network device. In an embodiment, a first node of a network receives a kernel source code from a second node of the network. The first node compiles the kernel source code to generate a kernel binary code, which is provided to the second node. Based on the kernel binary code being communicated to the second node, a software developer is able to perform a simulation that facilitates the development of an application binary code. The first node subsequently receives the application binary and an indication that the application binary is to be executed with the kernel binary at the first node. In some embodiments, the first node executes an application process and a kernel process to provide an application offload resource for another network node.

公开(公告)号：US20210048962A1

公开(公告)日：2021-02-18

申请号：US17084301

申请日：2020-10-29

Applicant: Intel Corporation

Inventor： Kapil Karkra ,  Mariusz Barczak ,  Michal Wysoczanski ,  Sanjeev Trika ,  James Guilmart

IPC: G06F3/06

Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to manage access to a storage system that includes a first persistent storage device and a second persistent storage device, capture input/output telemetry for a workload on the storage system, determine one or more write reduction factors and one or more write invalidation factors for the workload based on the captured input/output telemetry, and allocate storage for the workload between the first persistent storage device and the second persistent storage device based on the one or more write reduction factors and the one or more write invalidation factors. Other embodiments are disclosed and claimed.

公开(公告)号：US10908825B2

公开(公告)日：2021-02-02

申请号：US15939432

申请日：2018-03-29

Applicant: Intel Corporation

Inventor： Peng Li ,  Sanjeev Trika ,  Jawad Khan ,  Myron Loewen

IPC: G06F3/06 ,  G06F1/26 ,  G06F1/30 ,  G06F12/0868

Abstract: An embodiment of a semiconductor apparatus may include technology to determine a persistent region and a non-persistent region of a volatile media based on an amount of power available from one or more backup power sources, and periodically backup only the non-persistent region of the volatile media to a non-volatile media. Other embodiments are disclosed and claimed.

公开(公告)号：US10719462B2

公开(公告)日：2020-07-21

申请号：US16141411

申请日：2018-09-25

Applicant: Intel Corporation

Inventor： Sanjeev Trika

IPC: G06F13/28 ,  G06F13/16 ,  G06F12/10

Abstract: Technologies for data processing or computation on data storage devices include a data storage controller. The data storage controller is configured to receive a data request from a compute device, determine an input data range specified by the compute device to be processed in the data storage device without sending data located at the input data to the compute device, read input data from the input data range, perform a data operation on the input data specified by the compute device to generate output data, and write the output data to an output data range specified by the compute device.

公开(公告)号：US10678768B2

公开(公告)日：2020-06-09

申请号：US15639651

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Peng Li ,  Sanjeev Trika

IPC: G06F16/22

Abstract: Systems, apparatuses and methods may store data. A system may include a processor communicatively coupled to an indexing structure and a datastore log separate from the indexing structure. The indexing structure may store key data corresponding to a key of a key-value pair and an address for the key-value pair. The datastore log may store the key-value pair at the address in a logical band of a plurality of independent logical bands. In addition, the system may include a memory device coupled to the processor. The memory device may include instructions, which when executed by the processor, may cause the system to execute an operation involving the key-value pair.

公开(公告)号：US20190303284A1

公开(公告)日：2019-10-03

申请号：US15939398

申请日：2018-03-29

Applicant: Intel Corporation

Inventor： Sanjeev Trika ,  Jawad Khan ,  Peng Li ,  Myron Loewen

IPC: G06F12/02 ,  G06F3/06 ,  G06F17/30 ,  G06F21/62

Abstract: An embodiment of a mass storage apparatus may include first non-volatile media, second non-volatile media which provides a relatively larger write granularity as compared to the first non-volatile media, and logic communicatively coupled to the first and second non-volatile media to direct an access request to one of the first non-volatile media and the second non-volatile media based on an indication from an operating system. An embodiment of a host computing apparatus may include a processor, memory communicatively coupled to the processor, and logic communicatively coupled to the processor to provide an indication for a file system-related access request to a mass storage device based on a granularity size for the file system-related access request. Other embodiments are disclosed and claimed.

公开(公告)号：US20190243545A1

公开(公告)日：2019-08-08

申请号：US16384441

申请日：2019-04-15

Applicant: Intel Corporation

Inventor： Sanjeev Trika ,  Kshitij Doshi

IPC: G06F3/06 ,  G06F16/903 ,  G06F16/00 ,  G06F12/126 ,  G11C15/00 ,  G06F12/06 ,  G06F12/10 ,  G06F12/02

CPC classification number: G06F3/0604 ,  G06F3/0659 ,  G06F3/0673 ,  G06F12/02 ,  G06F12/06 ,  G06F12/10 ,  G06F12/126 ,  G06F16/00 ,  G06F16/90335 ,  G11C7/106 ,  G11C7/1087 ,  G11C7/16 ,  G11C15/00 ,  G11C27/026 ,  Y02D10/13

Abstract: An apparatus and method for performing search and replace operations at a storage controller of a storage device are disclosed. The storage controller can receive a search command with one or more parameters that instructs the storage controller to search for a data pattern in data stored in a memory and can locally search the data in the memory for the data pattern according to the parameters without transferring the data to a processor to perform the search. The parameters can include, but are not limited to, the data pattern or template to be searched, a data pattern length, a bit-mask, a logical block address (LBA) range, a byte offset, and an alignment parameter. Verdict bits can be provided to indicate data chunks in the memory that match the data pattern. Flags may define potential outputs to provide after searching, such as location and number of matches. A replace command with a set of parameters, including a write mask, can instruct the storage controller to replace the data pattern with a replacement or substitute pattern.

公开(公告)号：US20190146913A1

公开(公告)日：2019-05-16

申请号：US16244285

申请日：2019-01-10

Applicant: Intel Corporation

Inventor： Sanjeev Trika

IPC: G06F12/02 ,  G06F3/06 ,  G11C13/00

Abstract: An embodiment of a package apparatus may include technology to control a first persistent storage media of the electronic storage, control a second persistent storage media of the electronic storage, wherein the second persistent storage media includes one or more of a faster access time and a smaller granularity access as compared to the first persistent storage media, store a logical-to-physical table in the second persistent storage media, and, in response to a data copy command, update an entry in the logical-to-physical table corresponding to a destination logical block address for the data copy command to point to a same physical address as a source logical block address for the data copy command. Other embodiments are disclosed and claimed.