公开(公告)号：US11928177B2

公开(公告)日：2024-03-12

申请号：US17948126

申请日：2022-09-19

Applicant: Micron Technology, Inc.

Inventor： Fa-Long Luo

IPC: G06F17/16 ,  G06F1/03 ,  G06F12/02 ,  G06F17/14 ,  G11C11/4094

CPC classification number: G06F17/16 ,  G06F1/03 ,  G06F12/0207 ,  G06F17/147 ,  G11C11/4094

Abstract: Methods and apparatus for performing video processing matrix operations within a memory fabric. Various embodiments of the present disclosure are directed to converting a memory array into a matrix fabric for discrete cosine transform (DCT) matrix transformations and performing DCT matrix operations therein. Exemplary embodiments described herein perform DCT matrix-matrix multiplication operations within a memory device that includes a matrix fabric and matrix multiplication unit (MMU). In one embodiment, matrix-matrix multiplication operations are obtained using separate matrix-vector products. In one exemplary embodiment, the matrix fabric uses a “crossbar” construction of resistive elements. Each resistive element stores a level of impedance that represents the corresponding matrix coefficient value. The crossbar connectivity can be driven with an electrical signal representing the input vector as an analog voltage. The resulting signals can be converted from analog voltages to a digital values by an MMU to yield a vector-matrix product. In some cases, the MMU may additionally perform various other logical operations within the digital domain.

公开(公告)号：US20240078040A1

公开(公告)日：2024-03-07

申请号：US17929954

申请日：2022-09-06

Applicant: Micron Technology, Inc.

Inventor： Fa-Long Luo ,  Jaime Cummins

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0622 ,  G06F3/0656 ,  G06F3/067

Abstract: Examples described herein include systems and methods which include a multiple input, multiple output transceiver including a plurality of receive antenna configured to receive a plurality of receive signals, and a wireless receiver coupled to the plurality of antenna and configured to receive and decode the plurality of receive signals. The transceiver includes a memory array and a memory controller. The memory controller includes a data address generator configured to, during the decode of the plurality of receive signals, generate at least one memory address according to an access mode of a memory command associated with a memory access operation. The at least one memory address corresponds to a specific sequence of memory access instructions to access a memory cell of the memory array.

公开(公告)号：US11870513B2

公开(公告)日：2024-01-09

申请号：US17362672

申请日：2021-06-29

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Fa-Long Luo ,  Jaime Cummins ,  Tamara Schmitz ,  Jeremy Chritz

IPC: G06K9/00 ,  H04B7/0413 ,  G06N3/08 ,  G06N3/04

CPC classification number: H04B7/0413 ,  G06N3/04 ,  G06N3/08

Abstract: Examples described herein include systems and methods, including wireless devices and systems with neuron calculators that may perform one or more functionalities of a wireless transceiver. The neuron calculator calculates output signals that may be implemented, for example, using accumulation units that sum the multiplicative processing results of ordered sets from ordered neurons with connection weights for each connection between an ordered neuron and outputs of the neuron calculator. The ordered sets may be a combination of some input signals, with the number of signals determined by an order of the neuron. Accordingly, a kth-order neuron may include an ordered set comprising product values of k input signals, where the input signals are selected from a set of k-combinations with repetition. As an example in a wireless transceiver, the neuron calculator may perform channel estimation as a channel estimation processing component of the receiver portion of a wireless transceiver.

公开(公告)号：US11838046B2

公开(公告)日：2023-12-05

申请号：US17224962

申请日：2021-04-07

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Fa-Long Luo

IPC: H04B1/525 ,  H04L5/14 ,  H04L25/03 ,  H04L27/26

CPC classification number: H04B1/525 ,  H04L5/143 ,  H04L5/1461 ,  H04L25/03343 ,  H04L27/2633

Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of full duplex compensation with a self-interference noise calculator. The self-interference noise calculator may be coupled to antennas of a wireless device and configured to generate adjusted signals that compensate self-interference. The self-interference noise calculator may include a network of processing elements configured to combine transmission signals into intermediate results according to input data and delayed versions of the intermediate results. Each set of intermediate results may be combined in the self-interference noise calculator to generate a corresponding adjusted signal. The adjusted signal is received by a corresponding wireless receiver to compensate for the self-interference noise generated by a wireless transmitter transmitting on the same frequency band as the wireless receiver is receiving.

公开(公告)号：US11711797B2

公开(公告)日：2023-07-25

申请号：US17891746

申请日：2022-08-19

Applicant: Micron Technology, Inc.

Inventor： Fa-Long Luo ,  Glen E. Hush ,  Aaron P. Boehm

IPC: H04W72/12 ,  H04W72/1263 ,  H04B1/38 ,  G06F9/30 ,  H04W72/23 ,  H04W92/18 ,  H04W84/04

CPC classification number: H04W72/1263 ,  G06F9/3001 ,  H04B1/38 ,  H04W72/23 ,  H04W84/042 ,  H04W92/18

Abstract: Systems, apparatuses and method related to remotely executable instructions are described. A device may be wirelessly coupled to (e.g., physically separated) another device, which may be in a physically separate device. The another device may remotely execute instructions associated with performing various operations, which would have been entirely executed at the device absent the another device. The outputs obtained as a result of the execution may be transmitted, via the transceiver, back to the device via a wireless communication link (e.g., using resources of an ultra high frequency (UHF), super high frequency (SHF), extremely high frequency (EHF), and/or tremendously high frequency (THF) bands). The another device at which the instructions are remotely executable may include memory resources, processing resources, and transceiver resources; they may be configured to use one or several communication protocols over licensed or shared frequency spectrum bands, directly (e.g., device-to-device) or indirectly (e.g., via a base station).

公开(公告)号：US11709715B2

公开(公告)日：2023-07-25

申请号：US17943148

申请日：2022-09-12

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  Glen E. Hush ,  Fa-Long Luo

IPC: G06F9/50 ,  G06F12/02 ,  G06F12/14

CPC classification number: G06F9/5061 ,  G06F12/023 ,  G06F12/1425 ,  G06F2212/1016 ,  G06F2212/1052

Abstract: Apparatuses, systems, and methods related to memory pooling between selected memory resources are described. A system using a memory pool formed as such may enable performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on increased access to data that may improve performance of a mission profile. For instance, one apparatus described herein includes a memory resource, a processing resource coupled to the memory resource, and a transceiver resource coupled to the processing resource. The memory resource, the processing resource, and the transceiver resource are configured to enable formation of a memory pool between the memory resource and another memory resource at another apparatus responsive to a request to access the other memory resource transmitted from the processing resource via the transceiver.

公开(公告)号：US11620476B2

公开(公告)日：2023-04-04

申请号：US16874504

申请日：2020-05-14

Applicant: Micron Technology, Inc.

Inventor： Fa-Long Luo

IPC: G06K9/62 ,  G06N20/00 ,  G06V10/143 ,  G06V40/16

Abstract: Methods and apparatus for applying data analytics such as deep learning algorithms to sensor data. In one embodiment, an electronic device such as a camera apparatus including a deep learning accelerator (DLA) communicative with an image sensor is disclosed, the camera apparatus configured to evaluate unprocessed sensor data from the image sensor using the DLA. In one variant, the camera apparatus provides sensor data directly to the DLA, bypassing image signal processing in order to improve the effectiveness the DLA, obtain DLA results more quickly than using conventional methods, and further allow the camera apparatus to conserve power.

公开(公告)号：US20220399904A1

公开(公告)日：2022-12-15

申请号：US17821391

申请日：2022-08-22

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Fa-Long Luo

IPC: H03M13/15 ,  G06N3/04 ,  G06F7/544 ,  H03M13/11

Abstract: Examples described herein utilize multi-layer neural networks, such as multi-layer recurrent neural networks to decode encoded data (e.g., data encoded using one or more encoding techniques). The neural networks and/or recurrent neural networks have nonlinear mapping and distributed processing capabilities which are advantageous in many systems employing the neural network decoders and/or recurrent neural networks. In this manner, neural networks or recurrent neural networks described herein are used to implement error correction coding (ECC) decoders.

公开(公告)号：US20220368349A1

公开(公告)日：2022-11-17

申请号：US17302226

申请日：2021-04-27

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Fa-Long Luo ,  Jaime Cummins

IPC: H03M13/01 ,  H03M13/13 ,  H03M13/11 ,  G06N3/08 ,  G06N3/04

Abstract: Examples described herein utilize multi-layer neural networks, such as multi-layer recurrent neural networks to estimate message probability compute data based on encoded data (e.g., data encoded using one or more encoding techniques). The neural networks and/or recurrent neural networks may have nonlinear mapping and distributed processing capabilities which may be advantageous in many systems employing a neural network or recurrent neural network to estimate message probability compute data for a message probability compute (MPC) decoder. In this manner, neural networks or recurrent neural networks described herein may be used to implement aspects of error correction coding (ECC) decoders, e.g., an MPC decoder that iteratively decodes encoded data.

公开(公告)号：US11445157B2

公开(公告)日：2022-09-13

申请号：US17150828

申请日：2021-01-15

Applicant: Micron Technology, Inc.

Inventor： Fa-Long Luo ,  Jaime C. Cummins ,  Tamara Schmitz

IPC: H04N9/67 ,  H04N1/60 ,  G06F17/16 ,  H04N9/73

Abstract: Apparatuses, systems, and methods related to an image processor formed in an array of memory cells are described. An image processor as described herein is configured to reduce complexity and power consumption and/or increase data access bandwidth by performing image processing in the array of memory cells relative to image processing by a host processor external to the memory array. For instance, one apparatus described herein includes sensor circuitry configured to provide an input vector, as a plurality of bits that corresponds to a plurality of color components for an image pixel, and an image processor formed in an array of memory cells. The image processor is coupled to the sensor circuitry to receive the plurality of bits of the input vector. The image processor is configured to perform a color correction operation in the array by performing matrix multiplication on the input vector and a parameter matrix to determine an output vector that is color corrected.