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    Low cost multi-state magnetic memory
    31.
    发明授权
    Low cost multi-state magnetic memory 有权
    低成本多状态磁存储器

    公开(公告)号：US08018011B2

    公开(公告)日：2011-09-13

    申请号：US11860467

    申请日：2007-09-24

    Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger Klas Malmhall

    Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger Klas Malmhall

    IPC: H01L29/82 ,  G11C11/00

    CPC classification number: H01L43/08 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/5607

    Abstract: A multi-state current-switching magnetic memory element has a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.

    Abstract translation: 多状态电流切换磁存储元件具有磁隧道结（MTJ），用于存储多于一位的信息。 MTJ包括固定层，阻挡层和不均匀的自由层。 在一个实施例中，当每个单元具有2位时，当四个不同电平的电流之一被施加到存储元件时，所施加的电流使MTJ的非均匀自由层切换到四个不同的磁状态之一。 MTJ的宽开关电流分布是非均匀自由层的宽晶粒尺寸分布的结果。

    Spacer flash cell device with vertically oriented floating gate
    33.
    发明授权
    Spacer flash cell device with vertically oriented floating gate 失效
    具有垂直定向浮动栅极的隔板闪存单元

    公开(公告)号：US5479368A

    公开(公告)日：1995-12-26

    申请号：US129866

    申请日：1993-09-30

    Applicant: Parviz Keshtbod

    Inventor： Parviz Keshtbod

    IPC: H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792 ,  G11C16/04

    CPC classification number: H01L27/11521 ,  H01L27/115 ,  H01L29/4232 ,  H01L29/42324 ,  H01L29/42328 ,  H01L29/66825 ,  H01L29/7883

    Abstract: A flash EPROM cell has a reduced cell size by providing vertical coupling between the floating gate and the bit line during programming. The erase operation is done by tunneling of electrons from the sharp tip of the Poly spacer to the control gate. The cell is adapted so that the source for each cell within the array is the source of an adjacent cell and the drain is the drain to another adjacent cell. The cell is formed by forming the drain regions into the substrate through openings in a first insulator that is preferably the field oxide. A second insulator is deposited over the first insulator, over the substrate and along the side walls of the openings and is preferably a thin layer so that the opening is covered with a thin insulating layer. The insulated opening is filled with a first doped polysilicon layer. The field oxide is selectively removed. A gate oxide is grown and a second polysilicon layer is formed and then etched to form spacers along the edges of the first polysilicon/second insulator structure. The second polysilicon is selectively etched and a tunneling insulator layer is formed thereover. A third polysilicon layer is formed over the tunneling insulator.

    Abstract translation: 闪存EPROM单元在编程期间通过在浮动栅极和位线之间提供垂直耦合而具有减小的单元尺寸。 擦除操作是通过将电子从Poly间隔物的尖端引导到控制栅极进行的。 单元被适配成使得阵列内的每个单元的源极是相邻单元的源极，漏极是另一相邻单元的漏极。 通过在优选为场氧化物的第一绝缘体中的开口将漏区形成为衬底而形成电池。 第二绝缘体沉积在第一绝缘体上方，在衬底上并且沿着开口的侧壁，并且优选地是薄层，使得开口被薄绝缘层覆盖。 绝缘开口填充有第一掺杂多晶硅层。 有选择地去除场氧化物。 生长栅极氧化物并形成第二多晶硅层，然后蚀刻以沿着第一多晶硅/第二绝缘体结构的边缘形成间隔物。 选择性地蚀刻第二多晶硅，并在其上形成隧穿绝缘体层。 在隧道绝缘体上形成第三多晶硅层。

    METHOD OF SENSING DATA OF A MAGNETIC RANDOM ACCESS MEMORIES (MRAM)
    34.
    发明申请
    METHOD OF SENSING DATA OF A MAGNETIC RANDOM ACCESS MEMORIES (MRAM) 有权
    磁性随机存取记录（MRAM）的数据传感方法

    公开(公告)号：US20130329488A1

    公开(公告)日：2013-12-12

    申请号：US13491159

    申请日：2012-06-07

    Applicant: Ebrahim Abedifard ,  Parviz Keshtbod

    Inventor： Ebrahim Abedifard ,  Parviz Keshtbod

    IPC: G11C11/16

    CPC classification number: G11C11/1673 ,  G11C11/1657

    Abstract: A MTJ is sensed by applying a first reference current, first programming the MTJ to a first value using the first reference current, detecting the resistance of the first programmed MTJ, and if the detected resistance is above a first reference resistance, declaring the MTJ to be at a first state. Otherwise, upon determining if the detected resistance is below a second reference resistance, declaring the MTJ to be at a second state. In some cases, applying a second reference current through the MTJ and second programming the MTJ to a second value using the second reference current. Detecting the resistance of the second programmed MTJ and in some cases, declaring the MTJ to be at the second state, and in other cases, declaring the MTJ to be at the first state and programming the MTJ to the second state.

    Abstract translation: 通过施加第一参考电流来感测MTJ，首先使用第一参考电流将MTJ编程为第一值，检测第一编程MTJ的电阻，并且如果检测到的电阻高于第一参考电阻，则将MTJ声明为 处于第一个状态。 否则，在确定检测到的电阻是否低于第二参考电阻时，声明MTJ处于第二状态。 在某些情况下，通过MTJ施加第二参考电流，并使用第二参考电流对MTJ进行第二次编程。 检测第二个编程的MTJ的电阻，并且在某些情况下，声明MTJ处于第二状态，在其他情况下，声明MTJ处于第一状态并将MTJ编程到第二状态。

    Low cost multi-state magnetic memory
    40.
    发明授权
    Low cost multi-state magnetic memory 有权
    低成本多状态磁存储器

    公开(公告)号：US08330240B2

    公开(公告)日：2012-12-11

    申请号：US13213026

    申请日：2011-08-18

    Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger Klas Malmhall

    Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger Klas Malmhall

    IPC: H01L29/82 ,  G11C11/00

    CPC classification number: H01L43/08 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/5607

    Abstract: A multi-state current-switching magnetic memory element has a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.

    Abstract translation: 多状态电流切换磁存储元件具有磁隧道结（MTJ），用于存储多于一位的信息。 MTJ包括固定层，阻挡层和不均匀的自由层。 在一个实施例中，当每个单元具有2位时，当四个不同电平的电流之一被施加到存储元件时，所施加的电流使MTJ的非均匀自由层切换到四个不同的磁状态之一。 MTJ的宽开关电流分布是非均匀自由层的宽晶粒尺寸分布的结果。

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