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公开(公告)号：US20070296043A1
公开(公告)日：2007-12-27
申请号：US11841757
申请日：2007-08-20
IPC分类号： H01L29/76
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.
摘要翻译： 半导体器件包括半导体衬底，形成在衬底上的nMISFET，nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极，并由选自Ti，Zr，Hf， Ta，Sc，Y，镧系元素和锕系和选自所述一种金属元素的硼化物，硅化物和锗化合物的一种，以及形成在所述衬底上的pMISFET，所述pMISFET包括形成在所述衬底上的第二电介质和第二金属 栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成，第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成，绝缘材料与至少一部分 的第一电介质面向第一金属栅电极。
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公开(公告)号：US20070215956A1
公开(公告)日：2007-09-20
申请号：US11709857
申请日：2007-02-23
申请人： Yoshinori Tsuchiya , Masato Koyama
发明人： Yoshinori Tsuchiya , Masato Koyama
CPC分类号： H01L21/823814 , H01L21/26506 , H01L21/28052 , H01L21/28518 , H01L21/823835 , H01L21/823842 , H01L29/665
摘要： It is made possible to reduce the contact resistance of the source and drain in an n-type MISFET. A semiconductor device includes: a source and drain regions provided in a p-type semiconductor substrate so as to separate each other, each including: a silicide layer containing a first metal element as a main component having a vacuum work function of 4.6 eV or greater; and a layer containing at least one second metal element selected from the group of scandium elements and lanthanoid, the layer containing the second metal element including a segregating layer in which the highest areal density is 1×1014 cm−2 or higher, each region of the segregating layer with areal density of 1×1014 cm−2 or higher having a thickness smaller than 1 nm; a gate insulating film provided a region between the source and drain regions on the semiconductor substrate; and a gate electrode provided on the gate insulating film.
摘要翻译： 可以降低n型MISFET中的源极和漏极的接触电阻。 半导体器件包括：源区和漏区，设置在p型半导体衬底中以彼此分离，每个包括：含有第一金属元素作为主要成分的硅化物层，其真空功函数为4.6eV或更大 ; 以及包含选自钪元素和镧系元素中的至少一种第二金属元素的层，所述含有第二金属元素的层包含其中最高面密度为1×10 14 cm 2的偏析层 > -2°或更高，具有厚度小于1nm的面密度为1×10 14 cm -2或更高的分离层的每个区域; 栅绝缘膜设置在半导体衬底上的源区和漏区之间的区域; 以及设置在栅极绝缘膜上的栅电极。
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公开(公告)号：US20060208320A1
公开(公告)日：2006-09-21
申请号：US11230823
申请日：2005-09-21
IPC分类号： H01L29/76 , H01L21/3205
CPC分类号： H01L21/823835 , H01L21/823842 , H01L21/823857 , H01L21/84 , H01L27/1203 , H01L29/785
摘要： A MIS-type semiconductor device is configured with a semiconductor substrate, and a p-type MIS transistor, and a n-type MIS transistor which is provided on the semiconductor substrate, the p-type MIS transistor including a gate electrode which is made of Ge and one element which is selected from the group consisting of Ta, V and Nb.
摘要翻译： MIS型半导体器件配置有半导体衬底，p型MIS晶体管和设置在半导体衬底上的n型MIS晶体管，p型MIS晶体管包括栅电极，该栅电极由 Ge和选自Ta，V和Nb中的一种元素。
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公开(公告)号：US20060197157A1
公开(公告)日：2006-09-07
申请号：US11235246
申请日：2005-09-27
IPC分类号： H01L27/12
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： There is disclosed a semiconductor device comprising a P-channel MIS transistor which includes an N-type semiconductor layer, a first gate insulating layer formed on the N-type semiconductor layer and containing a carbon compound of a metal, and an N-channel MIS transistor which includes a P-type semiconductor layer, a second gate insulating layer formed on the P-type semiconductor layer, and a second gate electrode formed on the second gate insulating layer.
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公开(公告)号：US20060038239A1
公开(公告)日：2006-02-23
申请号：US11114105
申请日：2005-04-26
IPC分类号： H01L23/62
CPC分类号： H01L21/823842 , H01L21/84 , H01L27/1203 , H01L29/785
摘要： Disclosed is a semiconductor device comprising a semiconductor substrate having isolation regions a p-type MIS transistor comprising a pair of source/drain regions formed in the semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and a gate electrode formed on the gate insulating film and having a first metal layer at least at the gate electrode/gate insulator interface, and an n-type MIS transistor comprising a pair of source/drain regions formed in the semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and a gate electrode formed on the gate insulating film and having a boride layer of the first metal at least at an interface thereof with the gate insulating film.
摘要翻译： 公开了一种半导体器件，包括具有隔离区域的半导体衬底，p型MIS晶体管，包括形成在半导体衬底中的一对源极/漏极区，形成在半导体衬底上的栅极绝缘膜，以及形成在栅极上的栅电极 绝缘膜，并且至少在栅电极/栅极绝缘体界面处具有第一金属层，以及包括形成在半导体衬底中的一对源极/漏极区的n型MIS晶体管，形成在半导体衬底上的栅极绝缘膜， 以及形成在所述栅极绝缘膜上并且至少在与所述栅极绝缘膜的界面处具有所述第一金属的硼化物层的栅电极。
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公开(公告)号：US08461006B2
公开(公告)日：2013-06-11
申请号：US13434889
申请日：2012-03-30
申请人： Masato Koyama , Yoshinori Tsuchiya , Seiji Inumiya
发明人： Masato Koyama , Yoshinori Tsuchiya , Seiji Inumiya
IPC分类号： H01L21/8234
CPC分类号： H01L21/823842 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L29/4975 , H01L29/517 , H01L29/665 , H01L29/66545
摘要： It is made possible to provide a method for manufacturing a semiconductor device that includes CMISs each having a low threshold voltage Vth and a Ni-FUSI/SiON or high-k gate insulating film structure. The method comprises: forming a p-type semiconductor region and an n-type semiconductor region insulated from each other in a substrate; forming a first and second gate insulating films on the p-type and n-type semiconductor regions, respectively; forming a first nickel silicide having a composition of Ni/Si
摘要翻译： 可以提供一种半导体器件的制造方法，该半导体器件包括具有低阈值电压Vth和Ni-FUSI / SiON或高k栅极绝缘膜结构的CMIS。 该方法包括：在衬底中形成彼此绝缘的p型半导体区域和n型半导体区域; 在p型和n型半导体区分别形成第一和第二栅极绝缘膜; 在所述第二栅极绝缘膜上形成具有Ni / Si <31/12以上的第一栅极绝缘膜的第一镍硅化物和具有Ni / Si> 31/12的组成的第二硅化镍; 以及通过使铝通过第一硅化镍扩散，在第一硅化镍和第一栅极绝缘膜之间的界面处分离铝。
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公开(公告)号：US08304304B2
公开(公告)日：2012-11-06
申请号：US13184116
申请日：2011-07-15
IPC分类号： H01L21/8238
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.
摘要翻译： 半导体器件包括半导体衬底，形成在衬底上的nMISFET，nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极，并由选自Ti，Zr，Hf， Ta，Sc，Y，镧系元素和锕系和选自所述一种金属元素的硼化物，硅化物和锗化合物的一种，以及形成在所述衬底上的pMISFET，所述pMISFET包括形成在所述衬底上的第二电介质和第二金属 栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成，第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成，绝缘材料与至少一部分 的第一电介质面向第一金属栅电极。
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公开(公告)号：US08263452B2
公开(公告)日：2012-09-11
申请号：US12554339
申请日：2009-09-04
IPC分类号： H01L21/8238 , H01L21/302 , H01L29/76
CPC分类号： H01L21/823842 , H01L21/823864
摘要： A semiconductor device has an n-channel MIS transistor and a p-channel MIS transistor on a substrate. The n-channel MIS transistor includes a p-type semiconductor region formed on the substrate, a lower layer gate electrode which is formed via a gate insulating film above the p-type semiconductor region and which is one monolayer or more and 3 nm or less in thickness, and an upper layer gate electrode which is formed on the lower layer gate electrode, whose average electronegativity is 0.1 or more smaller than the average electronegativity of the lower layer gate electrode. The p-channel MIS transistor includes an n-type semiconductor region formed on the substrate and a gate electrode which is formed via a gate insulating film above the n-type semiconductor region and is made of the same metal material as that of the upper layer gate electrode.
摘要翻译： 半导体器件在衬底上具有n沟道MIS晶体管和p沟道MIS晶体管。 n沟道MIS晶体管包括形成在基板上的p型半导体区域，通过p型半导体区域上方的栅极绝缘膜形成并且为单层以上且3nm以下的下层栅电极 以及形成在下层栅电极上的上层栅电极，其平均电负性比下层栅电极的平均电负性小0.1或更小。 p沟道MIS晶体管包括形成在衬底上的n型半导体区域和通过n型半导体区域上方的栅极绝缘膜形成并由与上层相同的金属材料制成的栅电极 栅电极。
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公开(公告)号：US08169040B2
公开(公告)日：2012-05-01
申请号：US12824266
申请日：2010-06-28
IPC分类号： H01L21/70
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L27/092 , H01L29/495 , H01L29/4975 , H01L29/517 , H01L29/665
摘要： A semiconductor device includes: an n-channel MIS transistor and a p-channel MIS transistor. An n-channel MIS transistor includes: a first gate insulating film having an amorphous layer or an epitaxial layer formed on a p-type semiconductor region between a first source/drain regions; and a first gate electrode having a stack structure formed with a first metal layer and a first compound layer. The first metal layer is formed on the first gate insulating film and made of a first metal having a work function of 4.3 eV or smaller, and the first compound layer is formed on the first metal layer and contains a compound of a second metal and a IV-group semiconductor. The second metal is different from the first metal. A p-channel MIS transistor includes a second gate electrode having a second compound layer containing a compound of the same composition as the first compound layer.
摘要翻译： 半导体器件包括：n沟道MIS晶体管和p沟道MIS晶体管。 n沟道MIS晶体管包括：具有在第一源极/漏极区之间的p型半导体区域上形成的非晶层或外延层的第一栅极绝缘膜; 以及具有形成有第一金属层和第一化合物层的堆叠结构的第一栅电极。 第一金属层形成在第一栅极绝缘膜上，由功函数为4.3eV以下的第一金属构成，第一金属层形成在第一金属层上，并且含有第二金属和 IV族半导体。 第二种金属与第一种金属不同。 P沟道MIS晶体管包括具有第二化合物层的第二栅电极，第二化合物层含有与第一化合物层相同组成的化合物。
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公开(公告)号：US08148787B2
公开(公告)日：2012-04-03
申请号：US12719952
申请日：2010-03-09
IPC分类号： H01L21/70
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： There is disclosed a semiconductor device comprising a P-channel MIS transistor which includes an N-type semiconductor layer, a first gate insulating layer formed on the N-type semiconductor layer and containing a carbon compound of a metal, and an N-channel MIS transistor which includes a P-type semiconductor layer, a second gate insulating layer formed on the P-type semiconductor layer, and a second gate electrode formed on the second gate insulating layer.
摘要翻译： 公开了一种包括P沟道MIS晶体管的半导体器件，其包括N型半导体层，形成在N型半导体层上并含有金属的碳化合物的第一栅极绝缘层和N沟道MIS 晶体管，其包括P型半导体层，形成在P型半导体层上的第二栅极绝缘层和形成在第二栅极绝缘层上的第二栅电极。
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