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    COMPLEMENTARY SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    3.
    发明申请
    COMPLEMENTARY SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    补充半导体器件及其制造方法

    公开(公告)号：US20090114995A1

    公开(公告)日：2009-05-07

    申请号：US12200599

    申请日：2008-08-28

    申请人： Masamichi Suzuki ,  Masato Koyama ,  Yoshinori Tsuchiya ,  Hirotaka Nishino ,  Reika Ichihara ,  Akira Takashima

    发明人： Masamichi Suzuki ,  Masato Koyama ,  Yoshinori Tsuchiya ,  Hirotaka Nishino ,  Reika Ichihara ,  Akira Takashima

    IPC分类号： H01L27/08 ,  H01L21/3205

    CPC分类号： H01L21/823857 ,  H01L21/26506 ,  H01L21/31155 ,  H01L21/823842 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/7842 ,  H01L29/7846 ,  H01L29/785

    摘要： A complementary semiconductor device includes a semiconductor substrate, a first semiconductor region formed on a surface of the semiconductor substrate, a second semiconductor region formed on the surface of the semiconductor substrate apart from the first semiconductor region, an n-MIS transistor having a first gate insulating film including La and Al, formed on the first semiconductor region, and a first gate electrode formed on the gate insulating film, and a p-MIS transistor having a second gate insulating film including La and Al, formed on the second semiconductor region, and a second gate electrode formed on the gate insulating film, an atomic density ratio Al/La in the second gate insulating film being larger than an atomic density ratio Al/La in the first gate insulating film.

    摘要翻译： 互补半导体器件包括半导体衬底，形成在半导体衬底的表面上的第一半导体区域，形成在半导体衬底的离开第一半导体区域的表面上的第二半导体区域，具有第一栅极的n-MIS晶体管 形成在第一半导体区域上的包括La和Al的绝缘膜和形成在栅极绝缘膜上的第一栅电极和形成在第二半导体区上的具有包括La和Al的第二栅极绝缘膜的p-MIS晶体管， 以及形成在所述栅极绝缘膜上的第二栅电极，所述第二栅极绝缘膜中的原子密度比Al / La大于所述第一栅极绝缘膜中的原子密度比Al / La。

    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08053300B2

    公开(公告)日：2011-11-08

    申请号：US11841817

    申请日：2007-08-20

    申请人： Reika Ichihara ,  Yoshinori Tsuchiya ,  Masato Koyama ,  Akira Nishiyama

    发明人： Reika Ichihara ,  Yoshinori Tsuchiya ,  Masato Koyama ,  Akira Nishiyama

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823857 ,  H01L21/823462

    摘要： A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.

    摘要翻译： 半导体器件包括半导体衬底，形成在衬底上的nMISFET，nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极，并由选自Ti，Zr，Hf， Ta，Sc，Y，镧系元素和锕系和选自所述一种金属元素的硼化物，硅化物和锗化合物的一种，以及形成在所述衬底上的pMISFET，所述pMISFET包括形成在所述衬底上的第二电介质和第二金属 栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成，第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成，绝缘材料与至少一部分 的第一电介质面向第一金属栅电极。

    Semiconductor device
    5.
    发明申请
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US20100171184A1

    公开(公告)日：2010-07-08

    申请号：US12654490

    申请日：2009-12-22

    申请人： Reika Ichihara ,  Yoshinori Tsuchiya ,  Masato Koyama ,  Akira Nishiyama

    发明人： Reika Ichihara ,  Yoshinori Tsuchiya ,  Masato Koyama ,  Akira Nishiyama

    IPC分类号： H01L27/092

    CPC分类号： H01L21/823857 ,  H01L21/823462

    摘要： A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.

    摘要翻译： 半导体器件包括半导体衬底，形成在衬底上的nMISFET，nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极，并由选自Ti，Zr，Hf， Ta，Sc，Y，镧系元素和锕系和选自所述一种金属元素的硼化物，硅化物和锗化合物的一种，以及形成在所述衬底上的pMISFET，所述pMISFET包括形成在所述衬底上的第二电介质和第二金属 栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成，第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成，绝缘材料与至少一部分 的第一电介质面向第一金属栅电极。

    Method of making p-channel and n-channel MIS transistors using single film formation of TaC
    6.
    发明授权
    Method of making p-channel and n-channel MIS transistors using single film formation of TaC 有权
    使用TaC单膜形成制造p沟道和n沟道MIS晶体管的方法

    公开(公告)号：US07745888B2

    公开(公告)日：2010-06-29

    申请号：US12232078

    申请日：2008-09-10

    申请人： Masato Koyama ,  Reika Ichihara ,  Yoshinori Tsuchiya ,  Yuuichi Kamimuta ,  Akira Nishiyama

    发明人： Masato Koyama ,  Reika Ichihara ,  Yoshinori Tsuchiya ,  Yuuichi Kamimuta ,  Akira Nishiyama

    IPC分类号： H01L29/76

    CPC分类号： H01L21/823842

    摘要： A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, and an n-channel MIS transistor formed on a p-type well on the substrate, having a second gate dielectric and a second gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 60% or less.

    摘要翻译： 半导体器件包括衬底，形成在衬底上的n型阱上的p沟道MIS晶体管，具有形成在其上并由Ta-C合金形成的第一栅极电介质和第一栅电极，其中晶体取向比例 膜厚方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]的TaC（111）面为80％以上，n型沟道MIS晶体管形成在p- 在基板上良好地形成具有形成在其上的第二栅极电介质和第二栅电极，并且由TaC（111）在膜厚度方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]为60％以下。

    SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20090263950A1

    公开(公告)日：2009-10-22

    申请号：US12491984

    申请日：2009-06-25

    申请人： Masato Koyama ,  Yoshinori Tsuchiya ,  Yuuichi Kamimuta ,  Reika Ichihara ,  Katsuyuki Sekine

    发明人： Masato Koyama ,  Yoshinori Tsuchiya ,  Yuuichi Kamimuta ,  Reika Ichihara ,  Katsuyuki Sekine

    IPC分类号： H01L21/336

    CPC分类号： H01L27/092 ,  H01L21/28097 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4975 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7833

    摘要： A semiconductor device includes: a p-channel MIS transistor including: a first insulating layer formed on a semiconductor region between a source region and a drain region, and containing at least silicon and oxygen; a second insulating layer formed on the first insulating layer, and containing hafnium, silicon, oxygen, and nitrogen, and a first gate electrode formed on the second insulating layer. The first and second insulating layers have a first and second region respectively. The first and second regions are in a 0.3 nm range in the film thickness direction from an interface between the first insulating layer and the second insulating layer. Each of the first and second regions include aluminum atoms with a concentration of 1×1020 cm−3 or more to 1×1022 cm−3 or less.

    摘要翻译： 半导体器件包括：p沟道MIS晶体管，包括：第一绝缘层，形成在源极区域和漏极区域之间的半导体区域上，并且至少包含硅和氧; 形成在所述第一绝缘层上并且包含铪，硅，氧和氮的第二绝缘层，以及形成在所述第二绝缘层上的第一栅电极。 第一和第二绝缘层分别具有第一和第二区域。 第一和第二区域在从第一绝缘层和第二绝缘层之间的界面的膜​​厚度方向上为0.3nm的范围内。 第一和第二区域中的每一个包括浓度为1×10 20 cm -3或更高至1×10 22 cm -3或更小的铝原子。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    9.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20090166749A1

    公开(公告)日：2009-07-02

    申请号：US12233055

    申请日：2008-09-18

    申请人： Reika ICHIHARA ,  Yoshinori Tsuchiya ,  Hiroki Tanaka ,  Masahiko Yoshiki ,  Masato Koyama

    发明人： Reika ICHIHARA ,  Yoshinori Tsuchiya ,  Hiroki Tanaka ,  Masahiko Yoshiki ,  Masato Koyama

    IPC分类号： H01L27/092 ,  H01L21/8238

    CPC分类号： H01L21/823835 ,  H01L21/823842

    摘要： A semiconductor device includes n- and p-type semiconductor regions separately formed on a substrate, an interlayer insulator formed on the substrate and having first and second trenches formed to reach the n- and p-type regions. There are further included first and second gate insulators formed inside of the first and second trenches, a first metal layer formed inside of the first trench via the first gate insulator, a second metal layer formed in a thickness of 1 monolayer or more and 1.5 nm or less inside of the second trench via the second gate insulator, a third metal layer formed on the second metal layer and containing at least one of a simple substance, a nitride, a carbide and an oxide of at least one metal element of alkaline earth metal elements and group III elements, first and second source/drain regions formed on the n- and p-type regions.

    摘要翻译： 半导体器件包括分别形成在衬底上的n型和p型半导体区，形成在衬底上的层间绝缘体，并且具有形成为达到n型和p型区的第一和第二沟槽。 还包括形成在第一和第二沟槽内的第一和第二栅极绝缘体，经由第一栅极绝缘体形成在第一沟槽内部的第一金属层，形成为厚度为1单层或更多和1.5nm的第二金属层 或更少的内部经由所述第二栅极绝缘体，形成在所述第二金属层上并且包含至少一种碱土金属元素的单质，氮化物，碳化物和氧化物中的至少一种的第三金属层 金属元素和III族元素，形成在n型和p型区上的第一和第二源/漏区。