公开(公告)号：US20090140211A1

公开(公告)日：2009-06-04

申请号：US12066310

申请日：2006-09-22

申请人： Terry M. Tritt ,  Bo Zhang ,  Jian He

发明人： Terry M. Tritt ,  Bo Zhang ,  Jian He

IPC分类号： H01B1/12 ,  H01L21/02

CPC分类号： H01L35/32 ,  C30B25/005 ,  C30B35/00 ,  H01L35/26

摘要： The invention is directed to CVD methods and systems that can be utilized to form nanostructures. Exceptionally high product yields can be attained. In addition, the products can be formed with predetermined particle sizes and morphologies and within a very narrow particle size distribution. The systems of the invention include a CVD reactor designed to support the establishment of a convective flow field within the reactor at the expected carrier gas flow rates. In particular, the convective flow field within the reactor can include one or more flow vortices. The disclosed invention can be particularly beneficial for forming improved thermoelectric materials with high values for the figure of merit (ZT).

摘要翻译： 本发明涉及可用于形成纳米结构的CVD方法和系统。 可以获得极高的产品产量。 此外，产品可以以预定的粒度和形态形成并且在非常窄的粒度分布内。 本发明的系统包括设计成以预期的载气流量支持在反应器内建立对流流场的CVD反应器。 特别地，反应器内的对流流场可以包括一个或多个流动涡流。 所公开的发明可以特别有利于形成具有高品质因数（ZT）的改进的热电材料。

公开(公告)号：US20080306082A1

公开(公告)日：2008-12-11

申请号：US12093024

申请日：2006-11-15

申请人： Karl Robert Dahnke ,  Ho-Shen Lin ,  Michael Enrico Richett ,  Chuan Shih ,  Q May Wang ,  Bo Zhang

发明人： Karl Robert Dahnke ,  Ho-Shen Lin ,  Michael Enrico Richett ,  Chuan Shih ,  Q May Wang ,  Bo Zhang

IPC分类号： C07D409/04 ,  A61K31/506 ,  A61K31/496 ,  A61P11/00 ,  C07D409/14 ,  A61P19/02 ,  A61P35/00 ,  A61P29/00

CPC分类号： C07D409/04

摘要： The present invention provides compounds of Formula I: useful in the treatment of cancer and inflammatory diseases.

摘要翻译： 本发明提供式I化合物：可用于治疗癌症和炎性疾病。

公开(公告)号：US07453474B2

公开(公告)日：2008-11-18

申请号：US10611120

申请日：2003-06-30

申请人： Peter Faraday ,  Charles Robert Stoner ,  Joseph Stephen Beda ,  Kenneth Young ,  Bo Zhang

发明人： Peter Faraday ,  Charles Robert Stoner ,  Joseph Stephen Beda ,  Kenneth Young ,  Bo Zhang

IPC分类号： G09G5/373 ,  G06T3/40

CPC分类号： G06F3/04845

摘要： Vector graphics may be flexibly resized. Pins are associated with vector graphics control points, and when a canvas is resized, the pin locations are scaled according to the canvas resizing, and the control points associated with the pin are scaled according to a different positioning scheme. Pins may be fixed in location relative to the pin location, or may scale only in one direction. Control points not associated with a pin are scaled according to the canvas resizing. Other embodiments allow regions to be defined, in which control points are governed by a different positioning scheme, or allow a grid lines to be drawn defining the canvas into slices, where each slice is assigned a specific positioning scheme.

摘要翻译： 矢量图形可以灵活调整大小。 引脚与矢量图形控制点相关联，并且当画布调整大小时，根据画布调整大小对引脚位置进行缩放，并且根据不同的定位方案对与引脚相关联的控制点进行缩放。 引脚可以相对于引脚位置固定在位置上，或者可以在一个方向上缩放。 根据画布大小调整与引脚无关的控制点。 其他实施例允许定义区域，其中控制点由不同的定位方案控制，或允许绘制网格线，将画布定义为切片，其中每个切片被分配特定的定位方案。

公开(公告)号：US20080260029A1

公开(公告)日：2008-10-23

申请号：US11736397

申请日：2007-04-17

申请人： Bo Zhang

发明人： Bo Zhang

IPC分类号： H04N11/04

CPC分类号： H04N19/577 ,  H04N19/137 ,  H04N19/176 ,  H04N19/573 ,  H04N19/61

摘要： Presented herein are system(s) and method(s) for statistically prediction of weighting parameter estimation in video encoding. In one embodiment, there is presented a method for interpredicting a picture from at least one reference picture. The method comprises calculating statistics for pixels in the picture and the reference picture; generating weight parameters for the picture based on the statistics; and encoding the picture using said weight parameters.

摘要翻译： 这里呈现用于统计预测视频编码中的加权参数估计的系统和方法。 在一个实施例中，提供了一种用于从至少一个参考图片插值图像的方法。 该方法包括计算图像中的像素和参考图像的统计量; 基于统计量生成图片的权重参数; 并使用所述权重参数对图像进行编码。

公开(公告)号：US20080061828A1

公开(公告)日：2008-03-13

申请号：US11507896

申请日：2006-08-22

申请人： Bo Zhang

发明人： Bo Zhang

IPC分类号： H03K19/094

CPC分类号： H03K19/018564 ,  H03F3/191 ,  H03F3/45183 ,  H03F2200/387 ,  H03F2203/45201 ,  H03F2203/45638 ,  H03F2203/45641 ,  H03K19/0005

摘要： According to one exemplary embodiment, an inductor-tuned buffer circuit includes at least one input transistor for receiving a time varying input signal, where the at least one input transistor drives an output of the buffer circuit. The buffer circuit further includes a buffer inductor coupled to the output of the buffer circuit. The buffer circuit is utilized to drive a capacitive load through an interconnecting conductor, where the buffer inductor is situated in proximity to the capacitive load so as to cause a parasitic inductance of the interconnecting conductor to be less than, or much less than, the buffer inductor.

摘要翻译： 根据一个示例性实施例，电感器调谐缓冲电路包括用于接收时变输入信号的至少一个输入晶体管，其中至少一个输入晶体管驱动缓冲电路的输出。 缓冲电路还包括耦合到缓冲电路的输出的缓冲电感器。 缓冲电路用于通过互连导体驱动电容性负载，其中缓冲电感器位于电容性负载附近，以便使互连导体的寄生电感小于或远小于缓冲器 电感。

公开(公告)号：US07339996B2

公开(公告)日：2008-03-04

申请号：US10804914

申请日：2004-03-19

申请人： Sigang Qiu ,  Vedavalli Gomatam Krishnan ,  Bo Zhang

发明人： Sigang Qiu ,  Vedavalli Gomatam Krishnan ,  Bo Zhang

IPC分类号： H04B14/04 ,  H04L5/16

CPC分类号： H04L5/1453 ,  H04L25/4927

摘要： A technique is proposed to accurately estimate the Network CODEC levels for each PCM code a server modem generates. These levels are affected by the digital impairments such as Digital attenuation PAD in the trunk, the Robbed Bit Signaling, the type of CODEC (μ-law or a-law—or non standard), and by analog impairments such as loop distortion, noise, inter-modulation distortion, echo. At client modem equalizer output good estimates for these levels are derived. By detecting RBS pattern of the trunk, and using averages of decode levels of similar RBS slots, more accurate data points are obtained. By further replacing these levels with the closest CODEC receive levels, good accuracy is obtained. Non-monotonic points are detected and eliminated. An upper limit is set for constellation points to avoid saturation of the receiver. IMD correction is applied to the decode levels. Ideal points that are not signaled, are added if possible. When PAD-detection or Codec detection fails, PAD is set to 0 dB and the constellation is based on originally received and averaged data points. Techniques are presented for V.90 type modem constellation generation.

摘要翻译： 提出了一种技术来准确地估计服务器调制解调器生成的每个PCM码的网络CODEC电平。 这些电平受到数字损伤的影响，例如中继线中的数字衰减PAD，Robbed位信令，CODEC的类型（mu律或a律或非法），以及模拟损伤，如环路失真，噪声 ，互调失真，回波。 在客户端调制解调器均衡器输出这些级别的良好估计值得出。 通过检测中继线的RBS模式，并使用类似RBS时隙的解码电平的平均值，可获得更准确的数据点。 通过以最接近的CODEC接收电平进一步取代这些电平，获得良好的精度。 检测和消除非单调点。 设置星座点的上限以避免接收器饱和。 解码级别应用IMD校正。 没有发出信号的理想点，如果可能的话添加。 当PAD检测或编解码检测失败时，PAD设置为0 dB，星座基于原始接收和平均数据点。 提出了V.90型调制解调器星座生成技术。

公开(公告)号：US07313097B2

公开(公告)日：2007-12-25

申请号：US10390490

申请日：2003-03-17

申请人： Ali Ghiasi ,  Bo Zhang

发明人： Ali Ghiasi ,  Bo Zhang

IPC分类号： H04L1/00 ,  H04L12/26

CPC分类号： H04L1/243

摘要： A bit stream multiplexer includes an input ordering block, a plurality of multiplexers, an output ordering block, and a loop back circuitry. A bit stream demultiplexer includes an input ordering block, a plurality of demultiplexers, and an output ordering block. During testing, the transmit multiplexing integrated circuit and the receive demultiplexing integrated circuit are coupled into a circuit tester. Then, a plurality of input lines of the transmit multiplexing integrated circuit are coupled to a plurality of output data lines of the circuit tester. A loop back output of the transmit multiplexing integrated circuit is then coupled to a loop back input of the receive demultiplexing integrated circuit. A plurality of output lines of the receive demultiplexing integrated circuit are coupled to a plurality of input data lines of the circuit tester. Further, loop back control signals of the transmit multiplexing integrated circuit and the receive demultiplexing integrated circuit are coupled to control outputs of the circuit tester. The circuit tester is then operated to test the functionality of the integrated circuits.

摘要翻译： 比特流多路复用器包括输入排序块，多个多路复用器，输出排序块和环回电路。 比特流解复用器包括输入排序块，多个解复用器和输出排序块。 在测试期间，发射多路复用集成电路和接收解复用集成电路耦合到电路测试器中。 然后，发送多路复用集成电路的多条输入线耦合到电路测试器的多条输出数据线。 然后，发射多路复用集成电路的环回输出耦合到接收解复用集成电路的环回输入。 接收解复用集成电路的多条输出线耦合到电路测试器的多条输入数据线。 此外，发送多路复用集成电路和接收解复用集成电路的环回控制信号被耦合到电路测试器的控制输出。 然后操作电路测试器来测试集成电路的功能。

公开(公告)号：US20070280208A1

公开(公告)日：2007-12-06

申请号：US11421421

申请日：2006-05-31

申请人： Wesley H. Smith ,  Bo Zhang ,  Don Carmon ,  Mark Shanahan ,  Jeffrey A. Green

发明人： Wesley H. Smith ,  Bo Zhang ,  Don Carmon ,  Mark Shanahan ,  Jeffrey A. Green

IPC分类号： H04L12/66

CPC分类号： H04L65/1069 ,  H04L65/1053 ,  H04L65/1059 ,  H04M1/2535 ,  H04M1/7385 ,  H04M7/0069 ,  H04M2207/203

摘要： Embodiments of apparatuses, articles, methods, and systems for voice communication components within a partition of a computing platform are generally described herein. Other embodiments may be described and claimed.

摘要翻译： 这里一般地描述在计算平台的分区内的语音通信组件的装置，物品，方法和系统的实施例。 可以描述和要求保护其他实施例。

公开(公告)号：US07298301B2

公开(公告)日：2007-11-20

申请号：US10919093

申请日：2004-08-16

申请人： Bo Zhang

发明人： Bo Zhang

IPC分类号： H03M9/00

CPC分类号： H03M9/00 ,  H03K3/356043 ,  H03K3/356139 ,  H03K3/3562 ,  H03K17/04106 ,  H03K17/693 ,  H03K2005/00208 ,  H04J3/047

摘要： In accordance with the present invention a data processing circuit includes a first data path for processing first data. The first data path includes a first data storage circuit. A second data path is provided for processing second data. The second data path includes a second data storage circuit. A multiplexer having a first input coupled to the first data path and a second input coupled to the second data path receives the stored values. The multiplexer includes a select input coupled to a clock signal. A delay circuit is configured to delay storage of the second data in the second data storage circuit, wherein the first data storage circuit stores the first data in response to receiving a first timing signal, and the second data storage circuit stores the second data in response to receiving a second timing signal.

摘要翻译： 根据本发明，数据处理电路包括用于处理第一数据的第一数据路径。 第一数据路径包括第一数据存储电路。 提供第二数据路径用于处理第二数据。 第二数据路径包括第二数据存储电路。 具有耦合到第一数据路径的第一输入和耦合到第二数据路径的第二输入的多路复用器接收存储的值。 复用器包括耦合到时钟信号的选择输入。 延迟电路被配置为延迟第二数据存储电路中的第二数据的存储，其中第一数据存储电路响应于接收到第一定时信号而存储第一数据，并且第二数据存储电路存储第二数据作为响应 以接收第二定时信号。

公开(公告)号：US20070237345A1

公开(公告)日：2007-10-11

申请号：US11696308

申请日：2007-04-04

申请人： Bo Zhang ,  Ming Zhang ,  Lili Chen

发明人： Bo Zhang ,  Ming Zhang ,  Lili Chen

IPC分类号： H04R3/00 ,  H04R25/00

CPC分类号： H04R19/016 ,  H04R3/00

摘要： The invention provides a method for reducing phase variation of a signal generated by an electret condenser microphone. An error of a capacitance of the electret condenser microphone is reduced. An impedance of the electret condenser microphone is increased. A shunt resistance is added to the electret condenser microphone. A −3 dB cut-off frequency of the electret condenser microphone is lowered.

摘要翻译： 本发明提供一种减少由驻极体电容麦克风产生的信号的相位变化的方法。 驻极体电容麦克风的电容误差降低。 驻极体电容麦克风的阻抗增加。 对驻极体电容式麦克风加入并联电阻。 驻极体电容麦克风的-3 dB截止频率降低。