公开(公告)号：US20220285281A1

公开(公告)日：2022-09-08

申请号：US17750665

申请日：2022-05-23

Applicant: Micron Technology, Inc.

Inventor： Koustav Sinha ,  Xiaopeng Qu

IPC: H01L23/538 ,  H05K1/18 ,  H01L23/498 ,  H01L23/00

Abstract: A semiconductor device includes an array of flexible connectors configured to mitigate thermomechanical stresses. In one embodiment, a semiconductor assembly includes a substrate coupled to an array of flexible connectors. Each flexible connector can be transformed between a resting configuration and a loaded configuration. Each flexible connector includes a conductive wire electrically coupled to the substrate and a support material at least partially surrounding the conductive wire. The conductive wire has a first shape when the flexible connector is in the resting configuration and a second, different shape when the flexible connector is in the loaded configuration. The first shape includes at least two apices spaced apart from each other in a vertical dimension by a first distance, and the second shape includes the two apices spaced apart from each other in the vertical dimension by a second distance different than the first distance.

公开(公告)号：US20220189899A1

公开(公告)日：2022-06-16

申请号：US17653610

申请日：2022-03-04

Applicant: Micron Technology, Inc.

Inventor： Shams U. Arifeen ,  Christopher Glancey ,  Koustav Sinha

IPC: H01L23/00

Abstract: A microelectronic component comprises a substrate having at least one bond pad on a surface thereof and a metal pillar structure on the at least one bond pad, the metal pillar structure comprising a metal pillar on the at least one bond pad and a solder material having a portion within a reservoir within the metal pillar and another portion protruding from an end of the metal pillar opposite the at least one bond pad. Methods for forming the metal pillar structures, metal pillar structures, assemblies and systems incorporating the metal pillar structures are also disclosed.

公开(公告)号：US20220122958A1

公开(公告)日：2022-04-21

申请号：US17566397

申请日：2021-12-30

Applicant: Micron Technology, Inc.

Inventor： Quang Nguyen ,  Christopher Glancey ,  Shams U Arifeen ,  Koustav Sinha

IPC: H01L25/18 ,  H05K1/18 ,  H01L23/00 ,  H01L25/00 ,  H05K1/02 ,  H05K3/34

Abstract: Various embodiments described herein provide for printed circuit boards with one or more spaces for embedding components, which can be used to implement a memory sub-system.

公开(公告)号：US20220085002A1

公开(公告)日：2022-03-17

申请号：US17023037

申请日：2020-09-16

Applicant: Micron Technology, Inc.

Inventor： Quang Nguyen ,  Christopher Glancey ,  Shams U Arifeen ,  Koustav Sinha

IPC: H01L25/18 ,  H05K1/18 ,  H01L23/00 ,  H01L25/00 ,  H05K3/34 ,  H05K1/02

Abstract: Various embodiments described herein provide for printed circuit boards with one or more spaces for embedding components, which can be used to implement a memory sub-system.

公开(公告)号：US20210193607A1

公开(公告)日：2021-06-24

申请号：US16719643

申请日：2019-12-18

Applicant: Micron Technology, Inc.

Inventor： Shams U. Arifeen ,  Christopher Glancey ,  Koustav Sinha ,  Xiao Li

IPC: H01L23/00 ,  B23K1/19

Abstract: Solder joints comprising two different solder materials having different melting points, an outer solder material extending over an inner solder material bonded to a conductive pad, the inner solder material having a lower melting point than a melting point of the outer solder material and being in a solid state at substantially ambient temperature. A metal material having a higher melting point than a melting point of either solder material may coat at least a portion of the inner solder material. Microelectronic components, assemblies and electronic systems incorporating the solder joints, as well as processes for forming and repairing the solder joints are also disclosed.

公开(公告)号：US20210121969A1

公开(公告)日：2021-04-29

申请号：US16664627

申请日：2019-10-25

Applicant: Micron Technology, Inc.

Inventor： Koustav Sinha ,  Hyunsuk Chun

IPC: B23K1/20 ,  H01L23/498

Abstract: An apparatus for a BGA package includes a pad mounted on a substrate. The apparatus also includes a solder resist layer disposed over the substrate and a buffer layer disposed over the solder resist layer. The solder resist layer can have a first aperture and the buffer layer can have a second aperture. The first and second apertures are aligned such that at least a portion of the pad is exposed to create a solder-mask-defined mounting pad. A diameter of the second aperture is larger than a diameter of the first aperture.