公开(公告)号：US20230335522A1

公开(公告)日：2023-10-19

申请号：US18212665

申请日：2023-06-21

申请人： Micron Technology, Inc.

发明人： Shams U. Arifeen ,  Quang Nguyen ,  Christopher Glancey ,  Koustav Sinha ,  Chan H. Yoo

IPC分类号： H01L23/00

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/1147 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13078 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/3512

摘要： Semiconductor devices having interconnect structures with conductive elements configured to mitigate thermomechanical stresses, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor package includes a semiconductor die and a pillar structure coupled to the semiconductor die. The pillar structure can include a plurality of conductive elements made of a first conductive material having a first elastic modulus. The pillar structure can further include a continuous region of a second conductive material at least partially surrounding the plurality of conductive elements. The second conductive material can have a second elastic modulus less than the first elastic modulus.

公开(公告)号：US20230154868A1

公开(公告)日：2023-05-18

申请号：US18151029

申请日：2023-01-06

申请人： Micron Technology, Inc.

发明人： Koustav Sinha ,  Shams U. Arifeen ,  Christopher Glancey

IPC分类号： H01L23/00 ,  H01L23/16 ,  H01L21/48 ,  H01L23/498 ,  H01L23/31

CPC分类号： H01L23/562 ,  H01L23/16 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/3128

摘要： Semiconductor devices having reinforcement structures configured to mitigate thermomechanical stresses, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor package includes a semiconductor die and a substrate coupled to the semiconductor die. The substrate can include a base structure and a reinforcement structure at least partially within a die shadow region of the substrate. The reinforcement structure can be at least partially surrounded by the base structure. The reinforcement structure has a higher stiffness than the base structure.

公开(公告)号：US20230065633A1

公开(公告)日：2023-03-02

申请号：US17459102

申请日：2021-08-27

申请人： Micron Technology, Inc.

发明人： Kaleb A. Wilson ,  Shams U. Arifeen ,  Bradley Russell Bitz ,  João Elmiro da Rocha Chaves ,  Mark A. Tverdy

IPC分类号： H05K1/02

摘要： Various embodiments described herein provide a label configured for thermal conductivity and configured to pass over an edge of a printed circuit board (PCB) and attached to both sides of the printed circuit board. The label can be used with a printed circuit board that is associated with a memory sub-system, such as a memory module (e.g., solid state drive, SSD module).

公开(公告)号：US11552029B2

公开(公告)日：2023-01-10

申请号：US17013321

申请日：2020-09-04

申请人： Micron Technology, Inc.

发明人： Koustav Sinha ,  Shams U. Arifeen ,  Christopher Glancey

IPC分类号： H01L23/00 ,  H01L23/16 ,  H01L21/48 ,  H01L23/498 ,  H01L23/31

摘要： Semiconductor devices having reinforcement structures configured to mitigate thermomechanical stresses, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor package includes a semiconductor die and a substrate coupled to the semiconductor die. The substrate can include a base structure and a reinforcement structure at least partially within a die shadow region of the substrate. The reinforcement structure can be at least partially surrounded by the base structure. The reinforcement structure has a higher stiffness than the base structure.

公开(公告)号：US11276659B2

公开(公告)日：2022-03-15

申请号：US16804413

申请日：2020-02-28

申请人： Micron Technology, Inc.

发明人： Shams U. Arifeen ,  Christopher Glancey ,  Koustav Sinha

IPC分类号： H01L23/00

摘要： A microelectronic component comprises a substrate having at least one bond pad on a surface thereof and a metal pillar structure on the at least one bond pad, the metal pillar structure comprising a metal pillar on the at least one bond pad and a solder material having a portion within a reservoir within the metal pillar and another portion protruding from an end of the metal pillar opposite the at least one bond pad. Methods for forming the metal pillar structures, metal pillar structures, assemblies and systems incorporating the metal pillar structures are also disclosed.

公开(公告)号：US11239133B2

公开(公告)日：2022-02-01

申请号：US17234079

申请日：2021-04-19

申请人： Micron Technology, Inc.

发明人： Xiaopeng Qu ,  Shams U. Arifeen

IPC分类号： G11C16/04 ,  H01L23/367 ,  G11C5/02 ,  G11C11/34 ,  H01L23/427

摘要： A semiconductor memory system having a plurality of semiconductor memory modules that are spaced apart from each other by a gap. The system includes a heat dissipation assembly having a thermally conductive base portion configured to transfer heat away from the memory devices. The heat dissipation assembly including at least one cooling unit extending from the base portion. The at least one cooling unit having a wall with an exterior surface and a cavity. The cooling unit is configured to fit in the gap between adjacent memory modules such that a portion of the exterior surface on a first side of the cooling unit is coupled to one of the first memory devices and another portion of the exterior surface on a second side of the cooling unit is coupled to one of the second memory devices across the gap.

公开(公告)号：US20210202337A1

公开(公告)日：2021-07-01

申请号：US17202542

申请日：2021-03-16

申请人： Micron Technology, Inc.

发明人： Hyunsuk Chun ,  Shams U. Arifeen ,  Chan H. Yoo ,  Tracy N. Tennant

IPC分类号： H01L23/31 ,  H01L21/48 ,  H01L23/498 ,  H01L21/683 ,  H01L21/56

摘要： A semiconductor device having a semiconductor die, a redistribution layer (RDL), and an encapsulant. The RDL layer can be formed on a first surface of the semiconductor die. The encapsulant can enclose a second surface and side surfaces of the semiconductor die. The encapsulant can enclose side portions of the RDL.

公开(公告)号：US20210183843A1

公开(公告)日：2021-06-17

申请号：US16717827

申请日：2019-12-17

申请人： Micron Technology, Inc.

发明人： Shams U. Arifeen ,  Xiaopeng Qu

IPC分类号： H01L25/18 ,  H01L23/498 ,  H01L23/00 ,  H01L25/00

摘要： Semiconductor devices and semiconductor device packages may include at least one first semiconductor die supported on a first side of a substrate. The at least one first semiconductor die may include a first active surface. A second semiconductor die may be supported on a second, opposite side of the substrate. The second semiconductor die may include a second active surface located on a side of the second semiconductor die facing the substrate. The second semiconductor die may be configured to have higher median power consumption than the at least one first semiconductor die during operation. An electronic system incorporating a semiconductor device package is disclosed, as are related methods.

公开(公告)号：US11855002B2

公开(公告)日：2023-12-26

申请号：US17240734

申请日：2021-04-26

申请人： Micron Technology, Inc.

发明人： Christopher Glancey ,  Shams U. Arifeen

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L23/31

CPC分类号： H01L23/562 ,  H01L23/3121 ,  H01L23/49861 ,  H01L2924/3511

摘要： A microelectronic device and/or microelectronic device package having a warpage control structure. The warpage control structure may be positioned over an encapsulating material, wherein the encapsulating material is positioned between the warpage control structure and a die positioned over a substrate. The warpage control structure may have a first thickness over a first portion of the encapsulating material and a second thickness over a second portion of the encapsulating material. Methods of forming the microelectronic device are also disclosed herein.

公开(公告)号：US11444037B2

公开(公告)日：2022-09-13

申请号：US17011799

申请日：2020-09-03

申请人： Micron Technology, Inc.

发明人： Hyunsuk Chun ,  Sheng Wei Yang ,  Shams U. Arifeen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/00 ,  H01L23/532 ,  H01L23/58 ,  H01L21/768 ,  H01L23/498

摘要： Semiconductor devices having metallization structures including crack-inhibiting structures, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor device includes a metallization structure formed over a semiconductor substrate. The metallization structure can include a bond pad electrically coupled to the semiconductor substrate via one or more layers of conductive material, and an insulating material—such as a low-κ dielectric material—at least partially around the conductive material. The metallization structure can further include a crack-inhibiting structure positioned beneath the bond pad between the bond pad and the semiconductor substrate. The crack-inhibiting structure can include a barrier member extending vertically from the bond pad toward the semiconductor substrate and configured to inhibit crack propagation through the insulating material.