公开(公告)号：US11984440B2

公开(公告)日：2024-05-14

申请号：US17493317

申请日：2021-10-04

Applicant: Micron Technology, Inc.

Inventor： Shams U. Arifeen ,  Xiaopeng Qu

IPC: H01L25/18 ,  H01L23/00 ,  H01L23/498 ,  H01L25/00

CPC classification number: H01L25/18 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/48145 ,  H01L2224/48225

Abstract: Semiconductor devices and semiconductor device packages may include at least one first semiconductor die supported on a first side of a substrate. The at least one first semiconductor die may include a first active surface. A second semiconductor die may be supported on a second, opposite side of the substrate. The second semiconductor die may include a second active surface located on a side of the second semiconductor die facing the substrate. The second semiconductor die may be configured to have higher median power consumption than the at least one first semiconductor die during operation. An electronic system incorporating a semiconductor device package is disclosed, as are related methods.

公开(公告)号：US11915997B2

公开(公告)日：2024-02-27

申请号：US16990943

申请日：2020-08-11

Applicant: Micron Technology, Inc.

Inventor： Xiaopeng Qu ,  Hyunsuk Chun ,  Eiichi Nakano

IPC: H01L23/473 ,  H01L25/065 ,  H01L25/00 ,  H01L23/367 ,  H01L21/48 ,  H01L25/18

CPC classification number: H01L23/4735 ,  H01L21/4871 ,  H01L23/3672 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50

Abstract: Semiconductor packages and/or assemblies having microchannels, a microchannel module, and/or a microfluidic network for thermal management, and associated systems and methods, are disclosed herein. The semiconductor package and/or assembly can include a substrate integrated with a microchannel and a coolant disposed within the microchannel to dissipate heat from a memory device and/or a logic device of the semiconductor package and/or assembly. The microchannel can be configured beneath the memory device and/or the logic device.

公开(公告)号：US20220394878A1

公开(公告)日：2022-12-08

申请号：US17819716

申请日：2022-08-15

Applicant: Micron Technology, Inc.

Inventor： Xiaopeng Qu ,  Hyunsuk Chun

IPC: H05K7/20 ,  H01L23/473 ,  H01R12/72

Abstract: A semiconductor component system includes a motherboard and a cooling system mounted to the motherboard. The cooling system includes sidewalls projecting from the motherboard. A sub-motherboard extends between the sidewalls and is spaced apart from the motherboard. The sidewalls and the sub-motherboard define a cooling channel over the motherboard. A connector is attached to the sub-motherboard and is configured to receive a semiconductor device daughterboard. The connector has contacts to electrically couple the semiconductor device daughterboard to the sub-motherboard.

公开(公告)号：US11515171B2

公开(公告)日：2022-11-29

申请号：US16895751

申请日：2020-06-08

Applicant: Micron Technology, Inc.

Inventor： Xiaopeng Qu ,  Hyunsuk Chun ,  Brandon P. Wirz ,  Andrew M. Bayless

IPC: H01L21/447 ,  H01L21/67 ,  H01L21/033 ,  B23K20/02

Abstract: This patent application relates to methods and apparatus for temperature modification and reduction of contamination in bonding stacked microelectronic devices with heat applied from a bond head of a thermocompression bonding tool. The stack is substantially enclosed within a skirt carried by the bond head to reduce heat loss and contaminants from the stack, and heat may be added from the skirt.

公开(公告)号：US20210407882A1

公开(公告)日：2021-12-30

申请号：US17061435

申请日：2020-10-01

Applicant: Micron Technology, Inc.

Inventor： Hyunsuk Chun ,  Xiaopeng Qu ,  Chan H. Yoo

IPC: H01L23/373 ,  H01L23/00 ,  H01L23/498 ,  H01L23/367

Abstract: Semiconductor device assemblies are provided with a package substrate including one or more layers of thermally conductive material configured to conduct heat generated by one or more of semiconductor dies of the assemblies laterally outward towards an outer edge of the assembly. The layer of thermally conductive material can comprise one or more allotropes of carbon, such as diamond, graphene, graphite, carbon nanotubes, or a combination thereof. The layer of thermally conductive material can be provided via deposition (e.g., sputtering, PVD, CVD, or ALD), via adhering a film comprising the layer of thermally conductive material to an outer surface of the package substrate, or via embedding a film comprising the layer of thermally conductive material to within the package substrate.

公开(公告)号：US20210204446A1

公开(公告)日：2021-07-01

申请号：US17201085

申请日：2021-03-15

Applicant: Micron Technology, Inc.

Inventor： Xiaopeng Qu

IPC: H05K7/20 ,  H05K7/14 ,  H05K1/18 ,  F28F3/02 ,  H05K1/02 ,  G06F1/20

Abstract: Assemblies include at least one substrate, at least one electronic device coupled to the substrate, and heat dissipation elements. The heat dissipation elements comprises at least one heat spreader in communication with the at least one electronic device and at least one heat sink in communication with the at least one heat spreader. Methods of dissipating heat energy includes transferring heat energy from memory devices to heat spreaders positioned adjacent to the memory devices and transferring the heat energy from the heat spreaders to a heat sink.

公开(公告)号：US10672679B2

公开(公告)日：2020-06-02

申请号：US16118889

申请日：2018-08-31

Applicant: Micron Technology, Inc.

Inventor： Xiaopeng Qu

IPC: H05K7/20 ,  H01L23/367 ,  G06F1/20

Abstract: A heat spreader for use in a memory system is provided, including a thermally conductive body having a first planar side surface and a second planar side surface opposite the first planar side surface, the first planar side surface configured to attach to a first plurality of co-planar semiconductor devices of a first memory module of the memory system, the second planar side surface configured to attach to a second plurality of co-planar semiconductor devices of a second memory module of the memory system, wherein the first planar side surface and the second planar side surface are separated by a body width w substantially equal to a distance between the first plurality of co-planar semiconductor devices and the second plurality of co-planar semiconductor devices.

公开(公告)号：US12243801B2

公开(公告)日：2025-03-04

申请号：US18154615

申请日：2023-01-13

Applicant: Micron Technology, Inc.

Inventor： Hyunsuk Chun ,  Xiaopeng Qu ,  Chan H. Yoo

IPC: H01L23/373 ,  H01L21/48 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498

Abstract: Semiconductor device assemblies are provided with a package substrate including one or more layers of thermally conductive material configured to conduct heat generated by one or more of semiconductor dies of the assemblies laterally outward towards an outer edge of the assembly. The layer of thermally conductive material can comprise one or more allotropes of carbon, such as diamond, graphene, graphite, carbon nanotubes, or a combination thereof. The layer of thermally conductive material can be provided via deposition (e.g., sputtering, PVD, CVD, or ALD), via adhering a film comprising the layer of thermally conductive material to an outer surface of the package substrate, or via embedding a film comprising the layer of thermally conductive material to within the package substrate.

公开(公告)号：US20240339437A1

公开(公告)日：2024-10-10

申请号：US18745638

申请日：2024-06-17

Applicant: Micron Technology, Inc.

Inventor： Hyunsuk Chun ,  Xiaopeng Qu

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L23/373 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/373 ,  H01L25/50 ,  H01L2225/06589

Abstract: Semiconductor device assemblies are provided with one or more layers of thermally conductive material disposed between adjacent semiconductor dies in a vertical stack. The thermally conductive material can be configured to conduct heat generated by one or more of the semiconductor dies in laterally outward towards an outer edge of the assembly. The layer of thermally conductive material can comprise one or more allotropes of carbon, such as diamond, graphene, graphite, carbon nanotubes, or a combination thereof. The layer of thermally conductive material can be provided via deposition (e.g., sputtering, PVD, CVD, or ALD), or via adhering a film comprising the layer of thermally conductive material to one or more of the semiconductor dies.

公开(公告)号：US11908803B2

公开(公告)日：2024-02-20

申请号：US17750665

申请日：2022-05-23

Applicant: Micron Technology, Inc.

Inventor： Koustav Sinha ,  Xiaopeng Qu

IPC: H01L23/538 ,  H05K1/18 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/5387 ,  H01L23/4985 ,  H01L24/48 ,  H05K1/189

Abstract: A semiconductor device includes an array of flexible connectors configured to mitigate thermomechanical stresses. In one embodiment, a semiconductor assembly includes a substrate coupled to an array of flexible connectors. Each flexible connector can be transformed between a resting configuration and a loaded configuration. Each flexible connector includes a conductive wire electrically coupled to the substrate and a support material at least partially surrounding the conductive wire. The conductive wire has a first shape when the flexible connector is in the resting configuration and a second, different shape when the flexible connector is in the loaded configuration. The first shape includes at least two apices spaced apart from each other in a vertical dimension by a first distance, and the second shape includes the two apices spaced apart from each other in the vertical dimension by a second distance different than the first distance.