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    FILLING CRACKS ON A SUBSTRATE VIA
    1.
    发明公开
    FILLING CRACKS ON A SUBSTRATE VIA 审中-公开

    公开(公告)号：US20240155767A1

    公开(公告)日：2024-05-09

    申请号：US18379371

    申请日：2023-10-12

    Applicant: Micron Technology, Inc.

    Inventor： Quang Nguyen ,  Christopher Glancey ,  Koustav Sinha

    IPC: H05K1/11 ,  H05K3/40

    CPC classification number: H05K1/116 ,  H05K3/4038 ,  H01L24/16 ,  H01L2224/16227

    Abstract: A semiconductor device assembly is provided. The assembly includes a substrate having a first layer with a first contact and a second layer with a second contact. A via that includes a first conductive material electrically couples the first contact and the second contact. A second conductive material having a lower melting point than the first conductive material is disposed at least partially between the via and the second contact. When a crack occurs between the via and the second contact, the second conductive material may be heated to fill the crack. Thus, the techniques, apparatuses, and systems disclosed herein may provide a repairable substrate.

    SEMICONDUCTOR DIE ASSEMBLIES WITH FLEXIBLE INTERCONNECTS AND ASSOCIATED METHODS AND SYSTEMS
    8.
    发明申请
    SEMICONDUCTOR DIE ASSEMBLIES WITH FLEXIBLE INTERCONNECTS AND ASSOCIATED METHODS AND SYSTEMS 有权

    公开(公告)号：US20250079371A1

    公开(公告)日：2025-03-06

    申请号：US18954176

    申请日：2024-11-20

    Applicant: Micron Technology, Inc.

    Inventor： Christopher Glancey ,  Shams U. Arifeen ,  Koustav Sinha ,  Quang Nguyen

    IPC: H01L23/00

    Abstract: Semiconductor die assemblies with flexible interconnects, and associated methods and systems are disclosed. The semiconductor die assembly includes a package substrate and a semiconductor die attached to the package substrate through the flexible interconnects. The flexible interconnects include one or more rigid sections and one or more flexible sections, each of which is disposed next to the rigid sections. The flexible sections may include malleable materials with relatively low melting temperatures (e.g., having relatively low modulus at elevated temperatures) such that the flexible interconnects can have reduced flexural stiffness during the assembly process. The malleable materials of the flexible interconnects, through plastic deformation in response to stress generated during the assembly process, may facilitate portions of the flexible interconnects to shift so as to reduce transfer of the stress to other parts of the semiconductor die assembly-e.g., circuitry of the semiconductor die.

    Semiconductor interconnect structures with conductive elements, and associated systems and methods
    9.
    发明授权
    Semiconductor interconnect structures with conductive elements, and associated systems and methods 有权

    公开(公告)号：US12211814B2

    公开(公告)日：2025-01-28

    申请号：US18212665

    申请日：2023-06-21

    Applicant: Micron Technology, Inc.

    Inventor： Shams U. Arifeen ,  Quang Nguyen ,  Christopher Glancey ,  Koustav Sinha ,  Chan H. Yoo

    IPC: H01L23/00

    Abstract: Semiconductor devices having interconnect structures with conductive elements configured to mitigate thermomechanical stresses, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor package includes a semiconductor die and a pillar structure coupled to the semiconductor die. The pillar structure can include a plurality of conductive elements made of a first conductive material having a first elastic modulus. The pillar structure can further include a continuous region of a second conductive material at least partially surrounding the plurality of conductive elements. The second conductive material can have a second elastic modulus less than the first elastic modulus.

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