公开(公告)号：US11688455B2

公开(公告)日：2023-06-27

申请号：US17028929

申请日：2020-09-22

Applicant: Micron Technology, Inc.

Inventor： Kyuseok Lee

IPC: G11C8/08 ,  G11C11/408 ,  G11C11/4097 ,  H01L27/105 ,  H01L29/423 ,  G11C8/14

CPC classification number: G11C11/4085 ,  G11C11/4097 ,  H01L27/105 ,  H01L29/423 ,  G11C8/08 ,  G11C8/14

Abstract: In some examples, a subword driver block of a memory device includes a first active region and a second active region adjacent to each other. The first active region forms drains/sources of a first and second transistors in a first region; the second active region forms drains/sources of a third and fourth transistors in a second region, where the first and second regions are adjacent to each other. The first, second, third and fourth transistors are coupled to a common non-active potential via a shared contact overlaid over a merged region between the first and second regions. The first and second active regions may comprise N+ diffusion materials.

公开(公告)号：US20230157000A1

公开(公告)日：2023-05-18

申请号：US17526356

申请日：2021-11-15

Applicant: Micron Technology, Inc.

Inventor： Kyuseok Lee

IPC: H01L27/108

CPC classification number: H01L27/10894 ,  H01L27/10897

Abstract: The present disclosure includes apparatuses and methods related to array and peripheral area masking. An example method comprises concurrently forming an array active area mask in an array active area and a peripheral component active area. The method further comprises forming a peripheral component active area mask in the peripheral component active area. The method further comprises concurrently forming etch stop spacers using the array active area mask in the array active area and the peripheral component active area. The method further comprises etching a portion of the peripheral component active area to open peripheral component conductive contact vias using the peripheral component active area mask together with the formed etch stop spacers in order to reduce over-etch of an opening to a device well while increasing surface area opening to a peripheral component conductive contact.

公开(公告)号：US11450375B2

公开(公告)日：2022-09-20

申请号：US17006730

申请日：2020-08-28

Applicant: Micron Technology, Inc.

Inventor： Takefumi Shirako ,  Masahiro Yokomichi ,  Kyuseok Lee ,  Sangmin Hwang

IPC: G11C8/08 ,  G11C11/408 ,  G11C11/16 ,  G11C8/14 ,  G11C5/14

Abstract: In some examples, a subword driver block of a memory device includes a plurality of active regions of a first type and a plurality of active regions of a second type adjacent to the plurality of active regions of the first type. The subword driver block further includes a plurality of first gate electrodes overlapping with the plurality of active regions of the first type to form a plurality of first transistors, and a plurality of second gate electrodes overlapping with the plurality of active regions of the first type to form a plurality of second transistors. Each of the second transistors is shared by a first subword driver and a second subword driver. Each of the second transistors may include a drain and a source respectively coupled to a first and second word line, which are driven by the first subword driver and the second subword driver, respectively.

公开(公告)号：US11200943B2

公开(公告)日：2021-12-14

申请号：US16953015

申请日：2020-11-19

Applicant: Micron Technology, Inc.

Inventor： Kyuseok Lee

IPC: G11C11/00 ,  G11C11/408 ,  G11C11/409 ,  G11C7/22 ,  G11C11/4078 ,  G11C11/4074

Abstract: A memory device includes a plurality of sub-word line drivers with, each sub-word line driver configured to receive a main word line signal and configured to drive a respective local word line to at least one of an active state, a soft-landing state, an off state based on the main word line signal and a phase signal. The memory device also includes a plurality of phase drivers with each phase driver configured to generate the respective phase signal. The memory device can further include a processing device configured to drive the respective local word line to the soft-landing state prior to entering the off state when transitioning from the active state to the off state so as to provide row hammer stress mitigation between adjacent local word lines corresponding to the plurality of sub-word line drivers. Each sub-word line driver includes a diode-connected transistor.

公开(公告)号：US20210202491A1

公开(公告)日：2021-07-01

申请号：US17203236

申请日：2021-03-16

Applicant: Micron Technology, Inc.

Inventor： Si-Woo Lee ,  Kyuseok Lee ,  Sangmin Hwang

IPC: H01L27/108 ,  G11C5/06 ,  H01L21/768

Abstract: A method of forming a microelectronic device comprises forming a spacer structure having a rectangular ring horizontal cross-sectional shape over a transistor, a portion of the spacer structure horizontally overlapping a drain region of the transistor. A masking structure is formed over the spacer structure and the transistor, the masking structure exhibiting an opening therein horizontally overlapping the drain region of the transistor and the portion of the spacer structure. A portion of an isolation structure overlying the drain region of the transistor is removed using the masking structure and the portion of the spacer structure as etching masks to form a trench vertically extending through the isolation structure to the drain region of the transistor. A drain contact structure is formed within the trench in the isolation structure. Microelectronic devices, memory devices, and electronic systems are also described.