公开(公告)号：US20110116507A1

公开(公告)日：2011-05-19

申请号：US12947678

申请日：2010-11-16

申请人： Alon Pais ,  Nafea Bishara

发明人： Alon Pais ,  Nafea Bishara

IPC分类号： H04L12/56

CPC分类号： H04L45/00 ,  H04L45/7453 ,  H04L49/3009

摘要： Some of the embodiments of the present disclosure provide a method comprising performing, by an iterative parser and classifier engine, a first parsing and classification cycle on a data packet, based at least in part on header information of the data packet; generating a first parsing and classification result based at least in part on performing the first parsing and classification cycle; and performing a second parsing and classification cycle on the data packet, based at least in part on header information of the data packet and the first parsing and classification result. Other embodiments are also described and claimed.

摘要翻译： 本公开的一些实施例提供了一种方法，其包括至少部分地基于数据分组的报头信息，由迭代解析器和分类器引擎执行数据分组上的第一解析和分类周期; 至少部分地基于执行第一解析和分类周期来生成第一解析和分类结果; 以及至少部分地基于所述数据分组的报头信息和所述第一解析和分类结果对所述数据分组执行第二分析和分类周期。 还描述和要求保护其他实施例。

公开(公告)号：US07672326B1

公开(公告)日：2010-03-02

申请号：US11378551

申请日：2006-03-17

申请人： William Lo ,  Nafea Bishara

发明人： William Lo ,  Nafea Bishara

IPC分类号： H04L12/28

CPC分类号： G06F13/385 ,  H04J3/0697

摘要： A double data rate SMII circuit comprises a transmit circuit, responsive to a clock signal, that samples serial transmit data on a clock rising edge to generate a first transmit serial stream. The transmit circuit, responsive to the clock signal, samples the serial transmit data on a clock falling edge to generate a second transmit serial stream. A receive circuit, responsive to the clock signal, generates a receive serial stream from two receive data streams. The receive serial stream having a first operating frequency, each of the two receive data streams having a second operating frequency. The first operating frequency is about twice the second operating frequency. A transmit port, corresponding to the transmit circuit, includes a single terminal to communicate the serial transmit data to the transmit circuit. A receive port, corresponding to the receive circuit, includes a single terminal to communicate the receive serial stream from the receive circuit.

摘要翻译： 双数据速率SMII电路包括响应于时钟信号的发送电路，其在时钟上升沿对采样串行发送数据进行采样以产生第一发送串行流。 响应于时钟信号的发送电路在时钟下降沿对采样串行发送数据进行采样以产生第二发送串行流。 响应于时钟信号的接收电路从两个接收数据流生成接收串行流。 接收串行流具有第一工作频率，两个接收数据流中的每一个具有第二工作频率。 第一个工作频率是第二个工作频率的两倍。 对应于发送电路的发送端口包括将串行发送数据传送到发送电路的单个端子。 对应于接收电路的接收端口包括用于从接收电路传送接收串行流的单个终端。

公开(公告)号：US07613189B1

公开(公告)日：2009-11-03

申请号：US11796143

申请日：2007-04-26

申请人： Yaniv Kopelman ,  Carmi Arad ,  Nafea Bishara

发明人： Yaniv Kopelman ,  Carmi Arad ,  Nafea Bishara

IPC分类号： H04L12/56 ,  G06F15/16

CPC分类号： H04L45/00 ,  H04L45/7457 ,  H04L49/3009

摘要： A network switch includes a matching device that employs a first data structure to select one of N address groups including a first partial address of an IP packet. An action table selects one of a next hop location corresponding to a longest prefix match and a first matching operation for the IP packet based on the selected one of the N groups. When the first matching operation is selected, the matching device employs a second data structure to select one of M address groups including a second partial address of the IP packet. The action table selects one of a next hop location corresponding to a longest prefix match and a second matching operation for the IP packet based on the selected one of the M groups. A routing engine routes the IP packet based on the first and second next hop locations.

摘要翻译： 网络交换机包括匹配设备，其采用第一数据结构来选择包括IP分组的第一部分地址的N个地址组之一。 动作表基于所选择的N个组中的一个，选择对应于最长前缀匹配的下一跳位置和针对IP分组的第一匹配操作中的一个。 当选择第一匹配操作时，匹配装置采用第二数据结构来选择包括IP分组的第二部分地址的M个地址组之一。 所述动作表基于所述M组中选择的一个，选择对应于最长前缀匹配的下一跳位置和所述IP分组的第二匹配操作中的一个。 路由引擎基于第一和第二下一跳位置来路由IP分组。

公开(公告)号：US07308612B1

公开(公告)日：2007-12-11

申请号：US11525326

申请日：2006-09-22

申请人： Nafea Bishara

发明人： Nafea Bishara

IPC分类号： G06F11/00

CPC分类号： H04L41/0672 ,  H04L45/22 ,  H04L47/58 ,  H04L49/253 ,  H04L49/552 ,  H04L49/557

摘要： A network switch comprises a plurality of ports that exchange frames of data with one or more network devices. A transfer circuit transfers the frames of the data between the ports. At least one of the ports includes a loopback circuit that sends to the transfer circuit each frame of the data received by the at least one of the ports from the transfer circuit when the one of the ports is not operational. A redirect circuit causes the transfer circuit to transfer each frame of the data received by the transfer circuit from the one of the ports to one or more predetermined others of the ports when the one of the ports is not operational.

摘要翻译： 网络交换机包括与一个或多个网络设备交换数据帧的多个端口。 传输电路在端口之间传输数据帧。 所述端口中的至少一个包括环回电路，当所述一个所述端口不可操作时，所述环回电路向所述传输电路发送所述至少一个所述端口从所述传输电路接收的数据的每一帧。 当一个端口不可操作时，重定向电路使得传送电路将传输电路接收的数据的每一帧从端口中的一个传送到端口中的一个或多个预定的其他端口。

公开(公告)号：US07212531B1

公开(公告)日：2007-05-01

申请号：US10167005

申请日：2002-06-10

申请人： Yaniv Kopelman ,  Carmi Arad ,  Nafea Bishara

发明人： Yaniv Kopelman ,  Carmi Arad ,  Nafea Bishara

IPC分类号： H04L12/56

CPC分类号： H04L45/00 ,  H04L45/7457 ,  H04L49/3009

摘要： A search engine improves search speed and reduces required memory for a longest prefix matching (LPM) router that routes packets using IP addresses. The search engine includes a first bit vector with set bits corresponding to address ranges. A set bit counter counts the set bits in the bit vector based on a first portion of the address of the a first packet. A first next hop table contains first pointers for each of the set bits. One of the first pointers is selected based on a number of set bits counted by the set bit counter. For longer addresses, the addresses are split into address portions. The search engine includes a trie data structure that has n levels. The n levels of the trie data structure include nodes representing non-overlapping address space.

摘要翻译： 搜索引擎提高搜索速度，并减少使用IP地址路由数据包的最长前缀匹配（LPM）路由器所需的内存。 搜索引擎包括具有对应于地址范围的设置位的第一位向量。 设置位计数器基于第一分组的地址的第一部分对比特向量中的设置比特进行计数。 第一个下一跳表包含每个设置位的第一个指针。 基于由设置的位计数器计数的设定位数来选择第一个指针之一。 对于较长的地址，地址被分割成地址部分。 搜索引擎包括具有n个级别的特里数据结构。 特里数据结构的n个级别包括表示非重叠地址空间的节点。

公开(公告)号：US08605727B1

公开(公告)日：2013-12-10

申请号：US13185231

申请日：2011-07-18

申请人： Nafea Bishara

发明人： Nafea Bishara

IPC分类号： H04L12/28

CPC分类号： H04L12/18 ,  H04L12/56 ,  H04L45/02 ,  H04L49/201 ,  H04L49/351 ,  H04L49/354

摘要： A system including a memory configured to store a bridge table, in which the bridge table includes an entry associating each of an Internet Protocol multicast destination address and an Internet Protocol source address with a port indicator, and the port indicator identifies one or more ports of a switch. The system further includes a controller configured to, in response to the switch receiving an Ethernet packet comprising an Internet Protocol multicast packet, i) generate a key based on each of an Internet Protocol multicast destination address and an Internet Protocol source address associated with the Ethernet packet, ii) lookup the bridge table using the key, and iii) flood the Ethernet packet to the one or more ports identified by the port indicator in response to confirming, based on the key, that the entry in the bridge table is an Internet Protocol multicast entry.

摘要翻译： 一种包括被配置为存储桥表的存储器的系统，其中所述网桥表包括将互联网协议组播目的​​地地址和因特网协议源地址中的每一个与端口指示符相关联的条目，并且所述端口指示符标识一个或多个端口 一个开关 所述系统还包括控制器，所述控制器被配置为响应于所述交换机接收包括因特网协议多播分组的以太网分组，i）基于与所述以太网相关联的因特网协议多播目的地地址和因特网协议源地址中的每一个生成密钥 分组，ii）使用密钥查找网桥表，以及iii）将以太网分组泛洪到由端口指示符标识的一个或多个端口，以响应于该密钥来确认桥表中的条目是因特网 协议组播条目。

公开(公告)号：US08566649B1

公开(公告)日：2013-10-22

申请号：US13371918

申请日：2012-02-13

申请人： Nafea Bishara

发明人： Nafea Bishara

IPC分类号： G06F11/00

CPC分类号： H04L41/0672 ,  H04L45/22 ,  H04L47/58 ,  H04L49/253 ,  H04L49/552 ,  H04L49/557

摘要： A network including a plurality of ports configured to exchange frames of data and a forwarding engine. The forwarding engine is configured to transfer the frames of data among the ports. Each frame of data includes an identifier that identifies a destination to which the frame is to be transferred by the forwarding engine. A first port of the plurality of ports includes a register configured to store an identifier of a backup port to be used in response to a failure of the first port, the backup port being among the plurality of port, and a redirect port. The redirect circuit is configured to, in response to the failure of the first port, replace the identifier in each frame of data identifying the first port as the destination port with the identifier of the backup port. Each frame having a replaced identifier is subsequently forwarded to the backup port.

摘要翻译： 一种网络，包括被配置为交换数据帧的多个端口和转发引擎。 转发引擎被配置为在端口之间传送数据帧。 每帧数据包括识别转发引擎将要传送该帧的目的地的标识符。 多个端口的第一端口包括：寄存器，被配置为存储响应于第一端口的故障而使用的备用端口的标识符，备用端口在多个端口中，以及重定向端口。 重定向电路被配置为响应于第一端口的故障，将标识第一端口的每个数据帧中的标识符替换为具有备份端口的标识符的目的地端口。 随后将具有替换的标识符的每个帧转发到备份端口。

公开(公告)号：US08401043B1

公开(公告)日：2013-03-19

申请号：US12621268

申请日：2009-11-18

申请人： Aviran Kadosh ,  Nafea Bishara ,  Yariv Anafi

发明人： Aviran Kadosh ,  Nafea Bishara ,  Yariv Anafi

IPC分类号： H04J3/04

CPC分类号： H04J3/047

摘要： In a data transfer interface, at least one deserializer receives a serial data stream at a first clock speed and outputs a first parallel data stream at a second clock speed. The first parallel data stream includes data symbols representing data and alignment symbols for aligning the data symbols at a downstream location. A demultiplexer demultiplexes the first parallel data stream into a plurality of second parallel data streams based on the alignment symbols.

摘要翻译： 在数据传输接口中，至少一个解串器以第一时钟速度接收串行数据流，并以第二时钟速度输出第一并行数据流。 第一并行数据流包括表示用于在下游位置对准数据符号的数据和对准符号的数据符号。 解复用器基于对准符号将第一并行数据流解复用为多个第二并行数据流。

公开(公告)号：US07778257B1

公开(公告)日：2010-08-17

申请号：US12044843

申请日：2008-03-07

申请人： Nafea Bishara ,  Awais B. Nemat

发明人： Nafea Bishara ,  Awais B. Nemat

IPC分类号： H04L12/28

CPC分类号： H04L12/4633

摘要： The present disclosure includes systems and techniques relating to virtual Ethernet switches. In some implementations, a system includes two or more Ethernet switches. Two or more components are included in the system to open at least one tunnel, over a network, between the two or more Ethernet switches to connect the two or more Ethernet switches together. In addition, two or more components are included in the system to operate a protocol over the opened at least one tunnel to manage the two or more Ethernet switches as a single unit that shares at least one network feature among all of the two or more Ethernet switches.

摘要翻译： 本公开包括与虚拟以太网交换机相关的系统和技术。 在一些实现中，系统包括两个或更多个以太网交换机。 系统中包括两个或多个组件，以打开两个或多个以太网交换机之间的网络中的至少一个隧道，以将两个或更多个以太网交换机连接在一起。 此外，系统中包括两个或多个组件以通过所打开的至少一个隧道来操作协议，以将两个或更多个以太网交换机作为在所有两个或更多个以太网中共享至少一个网络特征的单个单元来管理 开关。

公开(公告)号：US07606230B1

公开(公告)日：2009-10-20

申请号：US10958077

申请日：2004-10-04

申请人： Yuval Cohen ,  Nafea Bishara ,  Michael Orr

发明人： Yuval Cohen ,  Nafea Bishara ,  Michael Orr

IPC分类号： H04L12/28

CPC分类号： H04L45/00 ,  H04L45/24 ,  H04L45/245 ,  H04L45/60 ,  Y02D50/30

摘要： A wireless network apparatus and corresponding method and computer program comprises a plurality of ports to transmit and receive data flows comprising packets of data; a memory to store a routing table; a forwarding engine to transfer the packets of data between the ports according to the routing table; and a processor to define a routing interface comprising a selected group of the ports, map a selected media access control (MAC) address to the routing interface, disable link aggregation between the ports in the routing interface, disable bridging between the ports in the routing interface, and modify the routing table to direct each of the data flows having the MAC address as a destination address to one of the ports in the routing interface.

摘要翻译： 无线网络装置及其对应的方法和计算机程序包括多个端口，用于发送和接收包括数据包的数据流; 存储路由表的存储器; 转发引擎，根据路由表在端口之间传输数据包; 以及处理器，用于定义包括所选择的端口组的路由接口，将所选择的媒体访问控制（MAC）地址映射到路由接口，禁用路由接口中的端口之间的链路聚合，禁用路由中的端口之间的桥接 接口，并修改路由表，将具有MAC地址的每个数据流作为目的地址引导到路由接口中的一个端口。