公开(公告)号：US07176067B2

公开(公告)日：2007-02-13

申请号：US10869763

申请日：2004-06-16

申请人： In-Soo Jung ,  Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Yong-Hoon Son

发明人： In-Soo Jung ,  Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Yong-Hoon Son

IPC分类号： H01L21/339

CPC分类号： H01L29/7851 ,  H01L21/84 ,  H01L27/10823 ,  H01L27/10826 ,  H01L27/10876 ,  H01L27/10879 ,  H01L27/1203 ,  H01L29/66818 ,  H01L29/78603

摘要： A method of forming a fin field effect transistor on a semiconductor substrate includes forming an active region in the substrate, forming an epitaxial layer on the active region, and removing a portion of the epitaxial layer to form a vertical fin on the active region. The fin has a width that is narrower than a width of the active region. Removing a portion of the epitaxial layer may include oxidizing a surface of the epitaxial layer and then removing the oxidized surface of the epitaxial layer to decrease the width of the fin. The epitaxial layer may be doped in situ before removing a portion of the epitaxial layer. The method further includes forming a conductive layer on a top surface and on sidewalls of the fin. Related transistors are also discussed.

摘要翻译： 在半导体衬底上形成鳍状场效应晶体管的方法包括在衬底中形成有源区，在有源区上形成外延层，去除外延层的一部分以在有源区上形成垂直鳍。 翅片具有比有源区域的宽度窄的宽度。 去除外延层的一部分可以包括氧化外延层的表面，然后去除外延层的氧化表面以减小鳍的宽度。 在去除外延层的一部分之前，外延层可以原位掺杂。 该方法还包括在鳍的顶表面和侧壁上形成导电层。 还讨论了相关晶体管。

公开(公告)号：US07071048B2

公开(公告)日：2006-07-04

申请号：US10936033

申请日：2004-09-08

申请人： Yong-Hoon Son ,  Si-Young Choi ,  Byeong-Chan Lee ,  Deok-Hyung Lee ,  In-Soo Jung

发明人： Yong-Hoon Son ,  Si-Young Choi ,  Byeong-Chan Lee ,  Deok-Hyung Lee ,  In-Soo Jung

IPC分类号： H01L21/8238

CPC分类号： H01L29/7851 ,  H01L21/823431 ,  H01L27/12 ,  H01L29/66795

摘要： A field effect transistor includes a vertical fin-shaped semiconductor active region having an upper surface and a pair of opposing sidewalls on a substrate, and an insulated gate electrode on the upper surface and opposing sidewalls of the fin-shaped active region. The insulated gate electrode includes a capping gate insulation layer having a thickness sufficient to preclude formation of an inversion-layer channel along the upper surface of the fin-shaped active region when the transistor is disposed in a forward on-state mode of operation. Related fabrication methods are also discussed.

摘要翻译： 场效应晶体管包括在衬底上具有上表面和一对相对侧壁的垂直鳍状半导体有源区，以及鳍状有源区的上表面和相对侧壁上的绝缘栅电极。 绝缘栅电极包括封盖栅极绝缘层，当晶体管处于正向导通状态工作模式时，其具有足以防止在鳍状有源区的上表面形成反型层通道的厚度。 还讨论了相关的制造方法。

公开(公告)号：US20050250279A1

公开(公告)日：2005-11-10

申请号：US11072103

申请日：2005-03-04

申请人： Yong-Hoon Son ,  Si-Young Choi ,  Byeong-Chan Lee ,  In-Soo Jung ,  Deok-Hyung Lee

发明人： Yong-Hoon Son ,  Si-Young Choi ,  Byeong-Chan Lee ,  In-Soo Jung ,  Deok-Hyung Lee

IPC分类号： H01L21/76 ,  H01L21/335 ,  H01L21/336 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/8242 ,  H01L27/088 ,  H01L27/108 ,  H01L27/12 ,  H01L29/06 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/7851 ,  H01L21/823481 ,  H01L29/0653 ,  H01L29/66545 ,  H01L29/66621

摘要： Methods for forming semiconductor devices are provided. A semiconductor substrate is etched such that the semiconductor substrate defines a trench and a preliminary active pattern. The trench has a floor and a sidewall. An insulating layer is provided on the floor and the sidewall of the trench and a spacer is formed on the insulating layer such that the spacer is on the sidewall of the trench and on a portion of the floor of the trench. The insulating layer is removed on the floor of the trench and beneath the spacer such that a portion of the floor of the trench is at least partially exposed, the spacer is spaced apart from the floor of the trench and a portion of the preliminary active pattern is partially exposed. A portion of the exposed portion of the preliminary active pattern is partially removed to provide an active pattern that defines a recessed portion beneath the spacer. A buried insulating layer is formed in the recessed portion of the active pattern. Related devices are also provided.

摘要翻译： 提供了形成半导体器件的方法。 蚀刻半导体衬底，使得半导体衬底限定沟槽和初步活性图案。 沟槽具有地板和侧壁。 绝缘层设置在地板上，并且沟槽的侧壁和间隔件形成在绝缘层上，使得间隔件位于沟槽的侧壁和沟槽底部的一部分上。 绝缘层在沟槽的地板上移除并且在间隔物的下面被移除，使得沟槽的底部的一部分至少部分地露出，间隔物与沟槽的底部间隔开，并且预活性图案的一部分 部分暴露。 部分地去除预活性图案的暴露部分的一部分以提供在间隔物下方限定凹陷部分的活性图案。 在活性图案的凹部中形成掩埋绝缘层。 还提供了相关设备。

公开(公告)号：US20050072992A1

公开(公告)日：2005-04-07

申请号：US10853616

申请日：2004-05-25

申请人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Yong-Hoon Son ,  In-Soo Jung

发明人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Yong-Hoon Son ,  In-Soo Jung

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L21/8234 ,  H01L29/786 ,  H01L29/76 ,  H01L31/062

CPC分类号： H01L29/785 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823437 ,  H01L29/66553 ,  H01L29/66795

摘要： A method of forming a semiconductor device may include forming a fin structure extending from a substrate. The fin structure may include first and second source/drain regions and a channel region therebetween, and the first and second source/drain regions may extend a greater distance from the substrate than the channel region. A gate insulating layer may be formed on the channel region, and a gate electrode may be formed on the gate insulating layer so that the gate insulating layer is between the gate electrode and the channel region. Related devices are also discussed.

摘要翻译： 形成半导体器件的方法可以包括形成从衬底延伸的翅片结构。 翅片结构可以包括第一和第二源极/漏极区域和它们之间的沟道区域，并且第一和第二源极/漏极区域可以比沟道区域延伸比衬底更大的距离。 可以在沟道区上形成栅极绝缘层，并且可以在栅极绝缘层上形成栅电极，使得栅极绝缘层位于栅电极和沟道区之间。 还讨论了相关设备。

公开(公告)号：US20080248628A1

公开(公告)日：2008-10-09

申请号：US12056500

申请日：2008-03-27

申请人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee

发明人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee

IPC分类号： H01L21/3205

CPC分类号： H01L21/762 ,  H01L27/11521 ,  H01L29/66795

摘要： Methods of forming integrated circuit devices include forming an electrically insulating layer having a semiconductor fin structure extending therethrough. This semiconductor fin structure may include at least one amorphous and/or polycrystalline semiconductor region therein. The at least one amorphous and/or polycrystalline semiconductor region within the semiconductor fin structure is then converted into a single crystalline semiconductor region. This semiconductor fin structure is then used as an active region of a semiconductor device.

摘要翻译： 形成集成电路器件的方法包括形成具有延伸穿过其中的半导体鳍片结构的电绝缘层。 该半导体鳍结构可以包括其中的至少一个非晶和/或多晶半导体区域。 然后将半导体鳍结构内的至少一个非晶和/或多晶半导体区域转换为单晶半导体区域。 然后将该半导体鳍结构用作半导体器件的有源区。

公开(公告)号：US07566602B2

公开(公告)日：2009-07-28

申请号：US11751857

申请日：2007-05-22

申请人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee

发明人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee

IPC分类号： H01L21/84

CPC分类号： H01L21/02675 ,  H01L21/02532 ,  H01L21/02645 ,  H01L21/2026 ,  H01L21/8221 ,  H01L21/84 ,  H01L27/0688

摘要： In a method of forming a single crystalline semiconductor layer, an amorphous layer may be formed on a seed layer that includes a single crystalline material. The single crystalline layer may be formed from the amorphous layer by irradiating a laser beam onto the amorphous layer using the seed layer as a seed for a phase change of the amorphous layer. The laser beam may have an energy for melting the amorphous layer, and the laser beam may be irradiated onto the amorphous layer without generating a superimposedly irradiated region of the amorphous layer. The single crystalline layer may include a high density of large-sized grains without generating a protrusion thereon through a simple process so that a semiconductor device including the single crystalline layer may have a high degree of integration and improved electrical characteristics.

摘要翻译： 在形成单晶半导体层的方法中，可以在包括单晶材料的籽晶层上形成非晶层。 可以通过使用种子层作为非晶层相变的种子将激光束照射到非晶层上，由非晶层形成单晶层。 激光束可以具有用于熔化非晶层的能量，并且可以将激光束照射到非晶层上而不产生非晶层的叠加照射的区域。 单晶层可以包括高密度的大尺寸晶粒，而不通过简单的工艺在其上产生突起，使得包括单晶层的半导体器件可以具有高度集成度和改善的电特性。

公开(公告)号：US20070218607A1

公开(公告)日：2007-09-20

申请号：US11751857

申请日：2007-05-22

申请人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee

发明人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee

IPC分类号： H01L21/84

CPC分类号： H01L21/02675 ,  H01L21/02532 ,  H01L21/02645 ,  H01L21/2026 ,  H01L21/8221 ,  H01L21/84 ,  H01L27/0688

摘要： In a method of forming a single crystalline semiconductor layer, an amorphous layer may be formed on a seed layer that includes a single crystalline material. The single crystalline layer may be formed from the amorphous layer by irradiating a laser beam onto the amorphous layer using the seed layer as a seed for a phase change of the amorphous layer. The laser beam may have an energy for melting the amorphous layer, and the laser beam may be irradiated onto the amorphous layer without generating a superimposedly irradiated region of the amorphous layer. The single crystalline layer may include a high density of large-sized grains without generating a protrusion thereon through a simple process so that a semiconductor device including the single crystalline layer may have a high degree of integration and improved electrical characteristics.

摘要翻译： 在形成单晶半导体层的方法中，可以在包括单晶材料的籽晶层上形成非晶层。 可以通过使用种子层作为非晶层相变的种子将激光束照射到非晶层上，由非晶层形成单晶层。 激光束可以具有用于熔化非晶层的能量，并且可以将激光束照射到非晶层上而不产生非晶层的叠加照射的区域。 单晶层可以包括高密度的大尺寸晶粒，而不通过简单的工艺在其上产生突起，使得包括单晶层的半导体器件可以具有高度集成度和改善的电特性。

公开(公告)号：US20080293224A1

公开(公告)日：2008-11-27

申请号：US12126120

申请日：2008-05-23

申请人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee

发明人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee

IPC分类号： H01L21/20

CPC分类号： H01L45/144 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1675

摘要： In a method of forming a diode, a first amorphous thin film doped with first impurities is formed on a single crystalline substrate. A second amorphous thin film doped with second impurities is formed on the first amorphous thin film. A laser beam having sufficient energy to melt both of the first and second amorphous thin films is irradiated on the first and second amorphous thin films to change crystal structures of the first and second amorphous thin films using the single crystalline substrate as a seed, so that first and second single crystalline thin films are sequentially formed on the single crystalline substrate.

摘要翻译： 在形成二极管的方法中，在单晶衬底上形成掺杂有第一杂质的第一非晶薄膜。 掺杂有第二杂质的第二非晶薄膜形成在第一非晶薄膜上。 将具有足够的能量来熔化第一和第二非晶薄膜的激光束照射在第一和第二非晶薄膜上，以使用单晶基板作为种子来改变第一和第二非晶薄膜的晶体结构，从而使得 第一和第二单晶薄膜依次形成在单晶衬底上。

公开(公告)号：US20080179665A1

公开(公告)日：2008-07-31

申请号：US12019046

申请日：2008-01-24

申请人： Jong-Wook Lee ,  Yong-Hoon Son ,  Si-Young Choi

发明人： Jong-Wook Lee ,  Yong-Hoon Son ,  Si-Young Choi

IPC分类号： H01L29/78

CPC分类号： H01L29/7841 ,  H01L21/268 ,  H01L27/0207 ,  H01L27/108 ,  H01L27/10802

摘要： A memory cell transistor includes a semiconductor substrate having a first impurity region of first conductivity type (e.g., N-type) therein. A U-shaped semiconductor layer having a second impurity region of first conductivity type therein is provided on the first impurity region. A gate insulating layer is provided, which lines a bottom and an inner sidewall of the U-shaped semiconductor layer. A gate electrode is provided on the gate insulating layer. The gate electrode is surrounded by the inner sidewall of the U-shaped semiconductor layer. A word line is provided, which is electrically coupled to the gate electrode, and a bit line is provided, which is electrically coupled to the second impurity region.

摘要翻译： 存储单元晶体管包括其中具有第一导电类型的第一杂质区（例如N型）的半导体衬底。 具有第一导电类型的第二杂质区的U形半导体层设置在第一杂质区上。 提供了栅极绝缘层，其对U形半导体层的底部和内侧壁进行排列。 栅电极设置在栅极绝缘层上。 栅电极被U形半导体层的内侧壁包围。 提供字线，其电耦合到栅电极，并且提供与第二杂质区电耦合的位线。

公开(公告)号：US20070034925A1

公开(公告)日：2007-02-15

申请号：US11586225

申请日：2006-10-25

申请人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  In-Soo Jung ,  Jin-Hwa Heo

发明人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  In-Soo Jung ,  Jin-Hwa Heo

IPC分类号： H01L29/94

CPC分类号： H01L29/7851 ,  H01L29/66795

摘要： Fin-Field Effect Transistors (Fin-FETs) are provided. A fin is provided on an integrated circuit substrate. The fin defines a trench on the integrated circuit substrate. A first insulation layer is provided in the trench such that a surface of the first insulation layer is recessed beneath a surface of the fin exposing sidewalls of the fin. A protection layer is provided on the first insulation layer and a second insulation layer is provided on the protection layer in the trench such that protection layer is between the second insulation layer and the sidewalls of the fin.

摘要翻译： 提供了场效应晶体管（Fin-FET）。 翅片设置在集成电路基板上。 翅片限定集成电路基板上的沟槽。 第一绝缘层设置在沟槽中，使得第一绝缘层的表面在鳍片的暴露翅片侧壁的表面下方凹进。 保护层设置在第一绝缘层上，第二绝缘层设置在沟槽中的保护层上，使得保护层位于第二绝缘层和鳍的侧壁之间。