公开(公告)号：US10217647B2

公开(公告)日：2019-02-26

申请号：US16032127

申请日：2018-07-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Ho Do ,  Jonghoon Jung ,  Sanghoon Baek ,  Seungyoung Lee ,  Taejoong Song ,  Jinyoung Lim

IPC: H01L21/8238 ,  H01L21/3213

Abstract: A method of manufacturing a semiconductor device may include forming active patterns, forming a polygonal mask pattern having a first width and a second width on the active patterns, forming an active region by executing a first etching process using the mask pattern, forming a first cutting mask for removing a first corner rounding in which a width of the active region is the first width, removing the first corner rounding by executing a second etching process using the first cutting mask, forming a second cutting mask for removing a second corner rounding in which the width of the active region is changed from the first width to the second width, and executing a third etching process using the second cutting mask.

公开(公告)号：US20180136713A1

公开(公告)日：2018-05-17

申请号：US15814790

申请日：2017-11-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaecheol Kim ,  Jinkyu Kim ,  Dongwoo Kim ,  Jeongho Kim ,  Jaesoo Chaung ,  Jongshik Ha ,  Heetae Oh ,  Hyeokseon Yu ,  Seungyoung Lee ,  Wooyoung Choi ,  Jaewoong Han ,  Mangun Hur

IPC: G06F1/32 ,  G06F15/78 ,  H03F3/217

Abstract: An electronic device includes a system-on-chip (SoC) including at least one component, a memory, and a processor functionally connected to the SoC and the memory. The processor is configured to apply a default voltage for driving the at least one component at a specific frequency. The processor is also configured to determine whether data on an offset voltage corresponding to the at least one component and the specific frequency is stored. The processor is further configured to apply the offset voltage, being different from the default voltage, to the at least one component when the data on the offset voltage is stored. Other embodiments are possible.

公开(公告)号：US09646960B2

公开(公告)日：2017-05-09

申请号：US15046200

申请日：2016-02-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sanghoon Baek ,  Jung-Ho Do ,  Taejoong Song ,  Giyoung Yang ,  Seungyoung Lee ,  Jinyoung Lim

IPC: H01L27/02 ,  H01L27/088 ,  H01L27/11 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L27/0207 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/088 ,  H01L27/092 ,  H01L27/1104

Abstract: A system-on-chip device may include a substrate with an active pattern, a gate electrode crossing the active pattern and extending in a first direction, and a first metal layer electrically connected to the active pattern and the gate electrode. The first metal layer may include a first metal line extending in the first direction and a second metal line spaced apart from the first metal line in the first direction to extend in a second direction crossing the first direction. The first and second metal lines may include first and second sidewalls parallel to the second direction, the first and second sidewalls may face each other, and the first sidewall may have a length that is two or three times a minimum line width.