公开(公告)号：US20170160316A1

公开(公告)日：2017-06-08

申请号：US15212200

申请日：2016-07-16

Applicant: STMicroelectronics S.r.l.

Inventor： Edoardo Botti ,  Marco Raimondi

IPC: G01R19/10 ,  H03F3/185 ,  H03F3/217 ,  H03F1/52

CPC classification number: G01R19/10 ,  H03F1/3205 ,  H03F1/523 ,  H03F3/185 ,  H03F3/2173 ,  H03F2200/03 ,  H03F2200/171 ,  H03F2200/393 ,  H03F2200/444 ,  H03F2200/456 ,  H03F2200/462 ,  H03F2200/471 ,  H03F2200/481

Abstract: A circuit includes a final stage that includes an H-bridge comprising first and second half-bridges. A read circuit is configured to read a load current supplied by a class-D audio-amplifier to a load. The read circuit is configured for estimating the load current by reading a current at an output by the first or second half-bridge by measuring a drain-to-source voltage during an ON period of a power transistor of the H-bridge. A sensing circuit is configured to detect a first drain-to-source voltage from a transistor of the first half-bridge and a second drain-to-source voltage from a corresponding transistor of the second half-bridge. The sensing circuit is also configured to compute a difference between the first drain-to-source voltage and the second drain-to-source voltage and to perform an averaging operation on the difference to obtain a sense voltage value to be supplied to an analog-to-digital converter.

公开(公告)号：US09660586B2

公开(公告)日：2017-05-23

申请号：US14797934

申请日：2015-07-13

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Marco Raimondi ,  Edoardo Botti

IPC: H03F3/217 ,  H03F1/02 ,  H03F3/183 ,  H03F3/21

CPC classification number: H03F3/45932 ,  H03F1/0205 ,  H03F3/183 ,  H03F3/185 ,  H03F3/211 ,  H03F3/217 ,  H03F3/2173 ,  H03F2200/03 ,  H03F2200/129 ,  H03F2200/171 ,  H03F2200/258 ,  H03F2200/351 ,  H03F2200/78 ,  H03F2203/21106

Abstract: A switching amplifier includes a first half-bridge PWM modulator, a second half-bridge PWM modulator, and at least one amplifier stage configured to receive input signals. The switching amplifier also includes a PWM control stage configured to control switching of the first PWM modulator and of the second PWM modulator as a function of the input signals, by respective first PWM control signals and second PWM control signals. The amplifier stage and the PWM control stage have a fully differential structure.

公开(公告)号：US09479180B2

公开(公告)日：2016-10-25

申请号：US14796396

申请日：2015-07-10

Applicant: STMICROELECTRONICS S.R.L

Inventor： Matteo Bellitra ,  Edoardo Botti

IPC: H03L5/00 ,  H03K5/003 ,  G05F1/613 ,  H03K19/003

CPC classification number: H03L5/00 ,  G05F1/613 ,  H03K5/003 ,  H03K19/00315

Abstract: An electronic device includes an output terminal, an output transistor having a control terminal and a conduction terminal coupled to the output terminal, and a resistor-capacitor (RC) compensation network configured to act on the control terminal of the output transistor. In addition, the electronic device includes a transconductance amplifier configured to drive the output terminal through the control terminal of the output transistor, and a Miller effect stage coupled to the RC compensation network and having an input port coupled to the transconductance amplifier and an output port coupled to the control terminal of the output transistor.

Abstract translation: 电子设备包括输出端子，具有控制端子和耦合到输出端子的导通端子的输出晶体管，以及被配置为作用于输出晶体管的控制端子的电阻 - 电容（RC）补偿网络。 此外，该电子设备包括跨导放大器，该跨导放大器经配置以通过输出晶体管的控制端驱动输出端，以及耦合到RC补偿网络的Miller效应级并具有耦合到跨导放大器的输入端口和输出端口 耦合到输出晶体管的控制端。

公开(公告)号：US20140023198A1

公开(公告)日：2014-01-23

申请号：US14036506

申请日：2013-09-25

Applicant: STMicroelectronics S.r.l.

Inventor： Edoardo Botti ,  Giovanni Gonano ,  Pietro Mario Adduci

IPC: H04R29/00

CPC classification number: H04R29/001 ,  H04R1/26 ,  H04R29/003 ,  H04R2420/05

Abstract: The present invention relates to a method and a circuit for testing a tweeter, said tweeter being part of a loudspeaker system, wherein the method includes the steps of: applying a high-frequency voltage signal to one terminal of said tweeter, said high-frequency voltage signal being generated by first electronic means; applying a constant voltage signal to the other terminal of said tweeter, said constant voltage signal being generated by second electronic means; measuring a current Iload that flows through said tweeter into said second electronic means; determining a connect/disconnect state of said tweeter from the value of said current.

Abstract translation: 本发明涉及一种用于测试高音单元的方法和电路，所述高音单元是扬声器系统的一部分，其中该方法包括以下步骤：将高频电压信号施加到所述高音单元的一个端子，所述高频 电压信号由第一电子装置产生; 向所述高音单元的另一端施加恒定电压信号，所述恒定电压信号由第二电子装置产生; 测量流过所述高音单元的电流Iload进入所述第二电子装置; 从所述电流的值确定所述高音单元的连接/断开状态。

公开(公告)号：US12081121B2

公开(公告)日：2024-09-03

申请号：US18310824

申请日：2023-05-02

Applicant: STMicroelectronics S.r.l.

Inventor： Edoardo Botti

IPC: H02M3/158 ,  H02M3/155 ,  H03F3/217 ,  H04R3/04

CPC classification number: H02M3/155 ,  H03F3/217 ,  H04R3/04 ,  H03F2200/03

Abstract: An audio electronic system includes a DC switching converter comprising first and second Zeta converters, each comprising an input stage, an output stage, a first switching stage, and a second switching stage. The input stage of each Zeta converter comprises a respective input inductor having a first terminal electrically coupled to the respective first switching stage. The input inductors of the input stages of the first and second Zeta converters are magnetically coupled in such a way that when current enters the terminal of the input inductor of the first Zeta converter that is coupled to the first switch stage of the first Zeta converter, a voltage induced by the coupled current is positive at the terminal of the input inductor of the second Zeta converter that is coupled to the first switching stage of the second Zeta converter.

公开(公告)号：US20220173706A1

公开(公告)日：2022-06-02

申请号：US17107269

申请日：2020-11-30

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Shenzhen) R&D Co. Ltd.

Inventor： Hong Wu Lin ,  Giovanni Gonano ,  Edoardo Botti

IPC: H03F3/217 ,  H03K17/687 ,  H04R3/00

Abstract: In an embodiment, a method for shaping a PWM signal includes: receiving an input PWM signal; generating an output PWM signal based on the input PWM signal by: when the input PWM signal transitions with a first edge of the input PWM signal, transitioning the output PWM signal with a first edge of the output PWM signal; and when the input PWM signal transitions with a second edge before the first edge of the output PWM signal transitions, delaying a second edge of the output PWM signal based on the first edge of the output PWM signal.

公开(公告)号：US10935592B2

公开(公告)日：2021-03-02

申请号：US16057089

申请日：2018-08-07

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Shenzhen) R&D Co, Ltd.

Inventor： Edoardo Botti ,  Davide Luigi Brambilla ,  Hong Wu Lin

IPC: G01R31/26 ,  H03K17/0814 ,  G05F3/08 ,  G01R19/00 ,  H03K17/687

Abstract: A circuit includes a field effect transistor having a gate driven via a drive signal. The field effect transistor has a drain-source voltage drop indicative of the intensity of a current flowing in the current path through the field effect transistor. The circuit also includes a pair of sensing transistors that include a first sensing field effect transistor arranged with its drain and gate coupled with the drain and the gate of the field effect transistor, respectively, and a second sensing field effect transistor having a gate configured for receiving a replica of the drive signal. The second sensing field effect transistor is arranged with its current path in series with the current path of the first sensing field effect transistor. A sensing signal at a sensing node is indicative of the current intensity flowing in the current path of the field effect transistor.

公开(公告)号：US10804796B2

公开(公告)日：2020-10-13

申请号：US16269195

申请日：2019-02-06

Applicant: STMicroelectronics S.r.l.

Inventor： Edoardo Botti ,  Arunkumar Salimath ,  Edoardo Bonizzoni ,  Franco Maloberti ,  Paolo Cacciagrano ,  Davide Luigi Brambilla

IPC: H02M3/07 ,  H03F3/217 ,  B60R16/033 ,  H04R3/00 ,  H02M3/00 ,  H02M3/158 ,  H03F1/02 ,  H03F3/187 ,  H02M1/00

Abstract: A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.

公开(公告)号：US20200280287A1

公开(公告)日：2020-09-03

申请号：US16794760

申请日：2020-02-19

Applicant: STMicroelectronics S.r.l.

Inventor： Noemi Gallo ,  Edoardo Botti

IPC: H03F1/26 ,  H03F3/217 ,  H03F3/181 ,  H03G11/00

Abstract: A clipping detector circuit includes a timer circuit and a counter circuit. The timer circuit is configured to monitor a time period elapsing since a last occurrence of an edge in a PWM signal, assert a first signal when the time period elapses, and de-assert the first signal and reset the time period as a result of an edge occurring in the PWM signal. The counter circuit is configured to determine a number of pulses in the PWM signal since the last de-assertion of the first signal, and assert a second signal when the number of pulses in the PWM signal since the last de-assertion of the first signal reaches m pulses. The clipping detector circuit is configured to generate a clipping detection signal indicative of whether the pulse-width modulated signal is clipped or not as a function of the first signal and the second signal.

公开(公告)号：US10523197B2

公开(公告)日：2019-12-31

申请号：US16261267

申请日：2019-01-29

Applicant: STMicroelectronics S.r.l.

Inventor： Edoardo Botti ,  Giovanni Gonano

IPC: H03K17/687 ,  H03F3/217 ,  H03K17/10

Abstract: A bi-directional switch circuit includes first and second transistors having their control electrodes coupled at a first common node and the current paths coupled at a second common node in an anti-series arrangement. First and second electrical paths coupled between the first common node and the first and second transistors, respectively, include first and second switches switchable between a conductive state and a non-conductive state. A third electrical path between the first and second common nodes includes a third switch switchable between a conductive state and a non-conductive state. The third switch is coupled with the first and second switches by a logical network configured to switch the third switch to the conductive state with the first and second switches switched to the non-conductive state, and to the non-conductive state with either one of the first and second switches switched to the conductive state.