Abstract:
A system and method for thinning an integrated circuit (IC) wafer. The system includes a support structure to hold the IC wafer and a mechanism to operate on the IC wafer. The support structure includes one or more inductive coils configured to transmit a power signal to the IC wafer and receive a feedback signal from the IC wafer. The system further includes a process controller to control the operation based at least in part on the feedback signal received from the IC wafer.
Abstract:
A method for manufacturing an integrated circuit (IC) device. A first IC wafer is diced to obtain a first superdie including a plurality of first die. A second IC wafer is diced to obtain a second superdie including a plurality of second die. The first superdie and the second superdie are placed on an interposer substrate to form at least part of a composite IC wafer, wherein each of the first die is aligned with a respective one of the second die in the composite IC wafer. The composite IC wafer is diced to obtain a plurality of IC devices, where each of the IC devices includes a respective one of the first die and the second die with which it is aligned.
Abstract:
A system and method for updating a display panel having a plurality of display lines, a plurality of gate lines and a plurality of pixels. A first pixel pair of the pixels is coupled to at least three gate lines and two source lines. A display driver is coupled to the source lines, and is configured to drive the source lines to update the pixels.
Abstract:
The disclosure generally describes input devices with associated processing system configured to perform display updating and capacitive sensing. The processing system includes first and second pluralities of display driver pads coupled with a plurality of source lines, and a plurality of sensor pads disposed between the first and second pluralities of display driver pads and coupled with a plurality of sensor electrodes through a plurality of conductive routing traces. The plurality of sensor electrodes includes at least one common electrode of a display device, the common electrode configured to be driven for display updating and capacitive sensing. The processing system is configured to drive the plurality of source lines for display updating, and to drive the plurality of sensor electrodes for capacitive sensing.
Abstract:
This disclosure generally describes an input device, a display device having an integrated capacitive sensing device, and an assembly for an input device. The input device comprises a plurality of sensor electrodes disposed in a first layer, and a processing system configured to detect presence of input objects in a sensing region defined proximate to the plurality of sensor electrodes. The input device further comprises a plurality of routing traces disposed in a second layer and coupled with the processing system, and a plurality of vias arranged in a regular pattern within an areal extent of the sensing region, wherein at least a portion of the plurality of vias couple the plurality of sensor electrodes with the plurality of routing traces.
Abstract:
This disclosure generally provides an input device that includes multiple sensor and display electrodes and a processing system. The processing system includes a plurality of local receivers coupled to respective ones of the sensor electrodes, where the local receivers are configured to acquire first resulting signals from the sensor electrodes. The processing system also includes a central receiver coupled to the sensor electrodes and configured to acquire second resulting signals from each of the sensor electrodes simultaneously.
Abstract:
This disclosure generally provides a processing system that includes a first controller coupled with a second controller via a first communication link. The first controller is configured to transmit display data to the second controller via the first communication link. The second controller is configured to drive, using the display data, one or more coupled display electrodes for performing display updating. The second controller is further configured to operate one or more coupled sensor electrodes to acquire capacitive sensing data, and to transmit the capacitive sensing data to the first controller via the first communication link.
Abstract:
A display device having a capacitive sensing device, a processing system, and a method are provided for detecting presence of an input object using a capacitive sensing device having a plurality of sensor electrodes arranged in a matrix. The described technique programmatically combines multiple sensor electrodes into a larger sensor electrode for absolute capacitive sensing. The sets of sensor electrodes that are combined may be selectively coupled based a window size and a step size associated with a number of sensor electrodes in common between the sets.
Abstract:
Embodiments described herein include an input device, a display device having a capacitive sensing device, a processing system and a method for detecting presence of an input object using a capacitive sensing device. In one embodiment, an input device includes a plurality of sensor electrodes arranged in a planar matrix array. Each sensor electrode is coupled to unique routing trace and has an identical geometric plan form that is symmetrical about a center of area of the sensor electrode. The geometric plan form of each sensor electrode includes core and a plurality of protrusions extending outward from the core. The protrusions are configured to overlap with protrusions extending outward from each adjacent sensor electrode of the matrix array.
Abstract:
In an example, a method of processing an integrated circuit (IC) die including active circuitry formed on a substrate and a front side having a plurality of metal layers formed on the substrate. The method includes forming vias in a substrate of the IC die using a laser configured to drill the vias from the front side of the IC die. The method includes forming metal contacts on first metal pads, and metal interconnects between second metal pads and the vias, using an single electroplating process, where the first metal pads and the second metal pads are exposed parts of a top layer of the plurality of metal layers, and where the metal interconnects at least partially fill the vias. The method includes thinning the substrate of the IC die to expose the metal interconnects in the vias at a back side of the IC die opposite the front side.