公开(公告)号：US11049929B2

公开(公告)日：2021-06-29

申请号：US16804152

申请日：2020-02-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kyungjin Jeon ,  Joonseok Park ,  Soyoung Koo ,  Myounghwa Kim ,  Eoksu Kim ,  Taesang Kim ,  Hyungjun Kim ,  Yeonkeon Moon ,  Geunchul Park ,  Sangwoo Sohn ,  Junhyung Lim ,  Hyelim Choi

IPC: H01L27/32 ,  H01L29/78 ,  H01L51/52 ,  H01L51/56 ,  H01L27/12 ,  H01L49/02

Abstract: A display device includes: a substrate; a first thin film transistor and a second thin film transistor arranged over the substrate; a display element connected to the first thin film transistor; a wiring connected to the second thin film transistor and including a first wiring layer and a second wiring layer; a pattern insulating layer arranged between the first wiring layer and the second wiring layer; a planarization layer covering the wiring; and a connection electrode arranged on the planarization layer and connected to the first wiring layer and the second wiring layer respectively through a first contact hole and a second contact hole.

公开(公告)号：US10777582B2

公开(公告)日：2020-09-15

申请号：US16120898

申请日：2018-09-04

Applicant: Samsung Display Co., Ltd. ,  Yonsei University Industry Foundation (Yonsei UIF)

Inventor： Taesang Kim ,  Hyunjae Kim ,  Junhyung Lim ,  Youngjun Tak

IPC: H01L27/12 ,  H01L27/32 ,  H01L27/24 ,  H01L29/786 ,  H01L29/49 ,  H01L29/66 ,  H01L51/50

Abstract: A method of manufacturing a thin film transistor substrate may include forming a gate electrode on a base substrate, forming a gate insulation layer on the base substrate, the gate insulation layer covering the gate electrode, performing a simultaneous ultraviolet ray irradiation and thermal treatment (SUT) process by irradiating an ultraviolet ray at the gate insulation layer and supplying heat to the gate insulation layer at substantially the same time, forming an active pattern on the gate insulation layer, the active pattern overlapping the gate electrode, and forming a source electrode and a drain electrode on the gate insulation layer, the source electrode and the drain electrode being electrically connected to the active pattern.

公开(公告)号：US10658399B2

公开(公告)日：2020-05-19

申请号：US16515153

申请日：2019-07-18

Applicant: Samsung Display Co., Ltd.

Inventor： Jihun Lim ,  Jaybum Kim ,  Joonseok Park ,  Kyoungseok Son ,  Junhyung Lim

IPC: H01L29/49 ,  H01L29/788 ,  H01L29/786 ,  H01L27/12 ,  H01L27/32 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/66

Abstract: A transistor includes a semiconductor layer comprising a channel portion, a first contact portion and a second contact portion, a gate electrode facing the floating gate, and a floating gate disposed between the semiconductor layer and the gate electrode, the floating gate being insulated from the semiconductor layer and the gate electrode. The floating gate comprises an oxide semiconductor.

公开(公告)号：US10340472B2

公开(公告)日：2019-07-02

申请号：US15657369

申请日：2017-07-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jaybum Kim ,  Eoksu Kim ,  Kyoungseok Son ,  Junhyung Lim ,  Jihun Lim

IPC: G09G3/32 ,  H01L27/11 ,  H01L27/32 ,  H01L51/00 ,  H01L51/52 ,  G09G3/3233

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

公开(公告)号：US12262598B2

公开(公告)日：2025-03-25

申请号：US18378656

申请日：2023-10-11

Applicant: Samsung Display Co., Ltd.

Inventor： Jaybum Kim ,  Myeongho Kim ,  Yeonhong Kim ,  Kyoungseok Son ,  Seungjun Lee ,  Seunghun Lee ,  Junhyung Lim

IPC: H10K59/124 ,  H01L27/12 ,  H10K59/121 ,  H10K71/00 ,  H01L25/16 ,  H01L25/18 ,  H10K59/12 ,  H10K59/65

Abstract: A display device is disclosed that includes: a substrate comprising a display area and a component area including a transmission area; a first thin-film transistor comprising a first semiconductor layer and a first gate electrode, the first semiconductor layer including a silicon semiconductor; a first insulating layer covering the first gate electrode; a second thin-film transistor comprising a second semiconductor layer arranged on the first insulating layer and a second gate electrode, the second semiconductor layer including an oxide semiconductor; a second insulating layer covering the second gate electrode and having a transmission hole overlapping the transmission area; an intermediate insulating layer between the first insulating layer and the second insulating layer; a conductive pattern between the intermediate insulating layer and the first insulating layer; and a display element arranged on the second insulating layer, wherein the transmission hole exposes an upper surface of the intermediate insulating layer.

公开(公告)号：US12225794B2

公开(公告)日：2025-02-11

申请号：US18373277

申请日：2023-09-27

Applicant: Samsung Display Co., Ltd.

Inventor： Soyoung Koo ,  Eoksu Kim ,  Hyungjun Kim ,  Yunyong Nam ,  Junhyung Lim ,  Kyungjin Jeon

IPC: H10K59/131 ,  G09G3/3266 ,  G09G3/3291 ,  H10K59/122 ,  H10K59/12

Abstract: A display apparatus is disclosed that includes contact holes formed to expose at least a portion of a conductive layer or a semiconductor layer without damage to the surface of the conductive layer or the semiconductor layer, and a method of manufacturing the display apparatus. The display apparatus includes a substrate, a conductive mound arranged on the substrate, a first insulating mound arranged on the substrate, and a semiconductor layer including a first region arranged on the conductive mound, and a second region arranged on the first insulating mound. The second region of the semiconductor layer substantially covers an upper surface of the first insulating mound.

公开(公告)号：US11575100B2

公开(公告)日：2023-02-07

申请号：US17082459

申请日：2020-10-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jaybum Kim ,  Eoksu Kim ,  Kyoungseok Son ,  Junhyung Lim ,  Jihun Lim

IPC: H01L51/52 ,  H01L51/00 ,  H01L27/11 ,  G09G3/32 ,  G09G3/3233 ,  H01L27/32

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

公开(公告)号：US11430847B2

公开(公告)日：2022-08-30

申请号：US16820102

申请日：2020-03-16

Applicant: SAMSUNG DISPLAY CO., LTD

Inventor： Kyoungseok Son ,  Jaybum Kim ,  Eoksu Kim ,  Junhyung Lim ,  Jihun Lim

IPC: H01L27/32 ,  H01L21/02 ,  H01L21/4757 ,  H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  H01L49/02 ,  H01L29/24

Abstract: A method of manufacturing a semiconductor device. A pre first semiconductor pattern having a crystalline semiconductor material is formed on a base substrate. A pre first insulation layer is formed on the pre first semiconductor pattern. A first semiconductor pattern is formed by defining a channel region in the pre first semiconductor pattern. A pre protection layer is formed on the pre first insulation layer. A pre second semiconductor pattern including an oxide semiconductor material is formed on the pre protection layer. A pre second insulation layer is formed on the pre second semiconductor pattern. The pre second insulation layer is patterned using an etching gas such that at least a portion of the pre second semiconductor pattern is exposed. A second semiconductor pattern is formed by defining a channel region in the pre second semiconductor pattern. The pre protection layer has a material with a first etch selectivity that is different from a second etch selectivity of the second insulation layer with respect to the etching gas.

公开(公告)号：US11289588B2

公开(公告)日：2022-03-29

申请号：US16824339

申请日：2020-03-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jaybum Kim ,  Seryeong Kim ,  Junhyung Lim ,  Taesang Kim

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/32 ,  H01L27/146 ,  H01L29/04 ,  H01L27/12

Abstract: A semiconductor device includes a base substrate. A first thin-film transistor is disposed on the base substrate. The first thin-film transistor includes a first input electrode, a first output electrode, a first semiconductor pattern disposed below a first insulating layer, and a first control electrode disposed on the first insulating layer and below a second insulating layer. A second thin-film transistor includes a second input electrode, a second output electrode, a second semiconductor pattern disposed on the second insulating layer, and a second control electrode disposed on an insulating pattern formed on the second semiconductor pattern and exposes a portion of the second semiconductor pattern. The first semiconductor pattern includes a crystalline semiconductor. The second semiconductor pattern includes an oxide semiconductor. The first semiconductor pattern, the first control electrode, the second semiconductor pattern, and the second control electrode are overlapped.

公开(公告)号：US20210336061A1

公开(公告)日：2021-10-28

申请号：US17370590

申请日：2021-07-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kyoungseok Son ,  Eoksu Kim ,  Jaybum Kim ,  Junhyung Lim ,  Jihun Lim

IPC: H01L29/786 ,  H01L27/12 ,  H01L27/32 ,  H01L23/485 ,  H01L51/00

Abstract: A display apparatus includes: a substrate on which a first area, a second area spaced apart from the first area, and a bending area between a first area and a second area and bent along a bending axis are defined; a first thin-film transistor (“TFT”) and a second TFT; and a first conductive layer and a second conductive layer. The first TFT includes: a first active layer including polycrystalline silicon; a first gate electrode; and a first electrode disposed at a level which is the same as a level of the first conductive layer, and the second TFT includes: a second active layer including an oxide semiconductor; a second gate electrode; and a second electrode disposed at a level which is the same as a level of the second conductive layer.