公开(公告)号：US10254608B2

公开(公告)日：2019-04-09

申请号：US15064378

申请日：2016-03-08

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Hun Noh ,  Masataka Kano ,  Yeon Keon Moon ,  Keun Kyu Song ,  Jun Ho Song ,  Hyun Sup Lee ,  Sang Hee Jang ,  Byung Seok Choi

IPC: G02F1/1343 ,  G02F1/1362

Abstract: Provided is a display device.The display device includes: a substrate; a light blocking pattern disposed on the substrate; a semiconductor pattern disposed on the light blocking pattern; a gate insulating layer disposed on the semiconductor pattern; a gate wiring; an interlayer insulating layer formed on the gate wiring; a first contact hole for exposing the source area; a data wiring disposed to extend in the second direction on the interlayer insulating layer and electrically connected to the source area via the first contact hole; a first passivation layer disposed on the data wiring; a second contact hole, which is disposed between the neighboring protrusion portions of the light blocking pattern so as not to overlap the light blocking pattern, and exposes the drain area; and a pixel electrode disposed on the first passivation layer and electrically connected to the drain area through the second contact hole.

公开(公告)号：US09870735B2

公开(公告)日：2018-01-16

申请号：US14926922

申请日：2015-10-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ji Hun Lim ,  Yeon Keon Moon ,  Masataka Kano ,  Jun Hyung Lim

IPC: G09G3/36 ,  G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0842 ,  G09G2320/043

Abstract: A display device includes: a plurality of pixels, wherein each of the plurality of pixels includes at least two double-gate transistors including a first gate electrode and a second gate electrode; conduction between source electrodes and drain electrodes of the at least two double-gate transistors is controlled by a voltage applied to the first gate electrode, and electrical connection between the second gate electrode and the first gate electrode of each of the at least two double-gate transistors is determined depending on a polarity of a voltage applied on average to each of the at least two double-gate transistors.

公开(公告)号：US09722089B2

公开(公告)日：2017-08-01

申请号：US14482413

申请日：2014-09-10

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yeon Keon Moon ,  Sang Woo Sohn ,  Katsushi Kishimoto ,  Takayuki Fukasawa ,  Sang Won Shin

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  C23C14/08 ,  C23C14/34

CPC classification number: H01L29/7869 ,  C23C14/083 ,  C23C14/086 ,  C23C14/3464 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02581 ,  H01L21/02631 ,  H01L29/66969

Abstract: A thin film transistor array panel includes a substrate and a gate line disposed on the substrate. The gate line includes a gate electrode. A gate insulating layer is disposed on the gate line. An oxide semiconductor layer is disposed on the gate insulating layer. The oxide semiconductor layer at least partially overlaps the gate electrode. A data line is disposed on the oxide semiconductor layer. The data line includes a source electrode and a drain electrode facing the source electrode. The oxide semiconductor layer includes tungsten, indium, zinc, or tin.

公开(公告)号：US09601518B2

公开(公告)日：2017-03-21

申请号：US14856405

申请日：2015-09-16

Applicant: Samsung Display Co., Ltd.

Inventor： Yeon Keon Moon ,  Masataka Kano ,  So Young Koo ,  Myoung Hwa Kim ,  Jun Hyung Lim

IPC: H01L29/12 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L27/1225 ,  H01L27/0705 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/127 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78648 ,  H01L29/7869

Abstract: A thin film transistor display panel including: a first insulating substrate; a first semiconductor disposed between the first insulating substrate and a first gate insulating layer; a gate electrode disposed on the first gate insulating layer, the gate electrode overlapping the first semiconductor; a second gate insulating layer disposed on the gate electrode; a second semiconductor disposed on the second gate insulating layer, the second semiconductor overlapping the gate electrode; an interlayer insulating layer disposed on the second semiconductor; and a source electrode and a drain electrode disposed on the interlayer insulating layer spaced apart from each other, the source electrode and the drain electrode connected to the first semiconductor and the second semiconductor.

公开(公告)号：US09478667B2

公开(公告)日：2016-10-25

申请号：US14661470

申请日：2015-03-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yeon Keon Moon ,  Masataka Kano ,  Sung-Hoon Yang ,  Ji Hun Lim ,  So Young Koo ,  Myoung Hwa Kim ,  Jun Hyung Lim

IPC: G02F1/136 ,  G02F1/1333 ,  H01L29/786 ,  H01L29/66 ,  G02F1/1368

CPC classification number: H01L29/78645 ,  G02F1/1368 ,  G02F2001/13685 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78648

Abstract: A thin film transistor substrate includes a substrate, a bottom gate on the substrate, a first insulating layer on the substrate and on the bottom gate, a drain on the first insulating layer, a source on the first insulating layer, the source including a first source at a first side of the drain and a second source at a second side of the drain, an active layer on the first insulating layer, the active layer including a first active layer contacting the drain and the first source and a second active layer contacting the drain and the second source, a second insulating layer on the drain, the source, and the active layer, and a top gate on the second insulating layer.

Abstract translation: 薄膜晶体管衬底包括衬底，衬底上的底栅，衬底上的第一绝缘层和底栅，第一绝缘层上的漏极，第一绝缘层上的源，源包括第一绝缘层 漏极的第一侧的源极和在漏极的第二侧的第二源极，在第一绝缘层上的有源层，有源层包括接触漏极和第一源极的第一有源层和与第一源极接触的第二有源层 漏极和第二源极，漏极，源极和有源层上的第二绝缘层，以及第二绝缘层上的顶栅极。

公开(公告)号：US20150255611A1

公开(公告)日：2015-09-10

申请号：US14487916

申请日：2014-09-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KATSUSHI KISHIMOTO ,  Yoshinori Tanaka ,  Yeon Keon Moon ,  Sang Woo Sohn ,  Sang Won Shin ,  Takayuki Fukasawa

IPC: H01L29/786 ,  H01L29/26 ,  H01J37/34

CPC classification number: H01L29/7869 ,  C23C14/3414 ,  H01J37/3429 ,  H01J37/3491 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78693

Abstract: An oxide sputtering target includes at least one of indium (In), zinc (Zn), tin (Sn), and gallium (Ga), and tungsten (W) in an amount from 0.005 mol % to 1 mol %.

Abstract translation: 氧化物溅射靶包括铟（In），锌（Zn），锡（Sn）和镓（Ga）以及钨（W）中的至少一种，其量为0.005mol％至1mol％。