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    Semiconductor apparatus capable of error revision using pin extension technique and design method therefor
    31.
    发明授权
    Semiconductor apparatus capable of error revision using pin extension technique and design method therefor 有权
    能够使用引脚扩展技术进行错误修正的半导体装置及其设计方法

    公开(公告)号：US08689163B2

    公开(公告)日：2014-04-01

    申请号：US12928021

    申请日：2010-12-01

    申请人： Dong-Yun Kim ,  Dong-Hoon Yeo ,  Hyun-Chul Shin ,  Kyung-Ho Kim ,  Byung-Tae Kang ,  Ju-Yong Shin ,  Sung-Chul Lee

    发明人： Dong-Yun Kim ,  Dong-Hoon Yeo ,  Hyun-Chul Shin ,  Kyung-Ho Kim ,  Byung-Tae Kang ,  Ju-Yong Shin ,  Sung-Chul Lee

    IPC分类号： G06F17/50

    CPC分类号： H01L23/525 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor apparatus and a design method for the semiconductor apparatus allow debugging or repairs by using a spare cell. The semiconductor apparatus includes a plurality of metal layers. At least one repair block performs a predetermined function. A spare block is capable of substituting for a function of the repair block. And at least one of the plurality of metal layers is predetermined to be a repair layer for error revision. At least one pin of the repair block is connected to the repair layer through a first pin extension, and at least one pin of the spare block is capable of extending to the repair layer. When the repair block is to be repaired, the pin extension of the repair layer and the repair block is disconnected, and at least one pin of the spare block is connected to the repair layer through a second pin extension.

    摘要翻译： 半导体装置的半导体装置和设计方法允许使用备用单元进行调试或维修。 半导体装置包括多个金属层。 至少一个修理块执行预定的功能。 备用块能够代替维修块的功能。 并且多个金属层中的至少一个被预先确定为用于错误修正的修复层。 修复块的至少一个销通过第一销延伸连接到修复层，并且备用块的至少一个引脚能够延伸到修复层。 当修理修理块时，修理层和维修块的销延伸被断开，备用块的至少一个引脚通过第二个引脚延伸连接到修复层。

    Catalytic combustor and fuel reformer having the same
    32.
    发明授权
    Catalytic combustor and fuel reformer having the same 失效
    催化燃烧器和燃料重整器具有相同的功能

    公开(公告)号：US08617269B2

    公开(公告)日：2013-12-31

    申请号：US12616115

    申请日：2009-11-10

    申请人： In-Hyuk Son ,  Woo-Cheol Shin ,  Jin-Goo Ahn ,  Jong-Rock Choi ,  Sung-Chul Lee

    发明人： In-Hyuk Son ,  Woo-Cheol Shin ,  Jin-Goo Ahn ,  Jong-Rock Choi ,  Sung-Chul Lee

    IPC分类号： B01J8/00

    CPC分类号： B01J19/2485 ,  B01J19/2495 ,  B01J2219/00117 ,  C01B3/34 ,  C01B2203/0233 ,  C01B2203/066 ,  C01B2203/0811 ,  C01B2203/0822 ,  C01B2203/0827 ,  F23C6/047 ,  F23C13/04 ,  F23C2900/03002 ,  Y02P20/128

    摘要： A catalytic combustor and a fuel reformer having the same. The catalytic combustor includes a housing having a cylindrical reaction portion and a second reaction portion surrounding the first reaction portion in a double tube shape. The housing has a first opening for supplying a first fuel and an oxidant to the first reaction portion and a second opening through which an exhaust in the second reaction portion is discharged. The first and second openings are disposed at first sides of the first and second reaction portions, respectively. The first and second reaction portions are connected with each other so that the fluid is communicated with the first and second reaction portions at second sides of the first and second reaction portions. A catalyst is disposed in the first reaction portion, and a mesh layer is inserted into the second reaction portion.

    摘要翻译： 催化燃烧器和具有该催化燃烧器的燃料重整器。 催化燃烧器包括具有圆柱形反应部分的壳体和围绕第二反应部分的双管形状的第二反应部分。 壳体具有用于向第一反应部分供应第一燃料和氧化剂的第一开口和排出第二反应部分中的排气的第二开口。 第一和第二开口分别设置在第一和第二反应部分的第一侧。 第一和第二反应部分彼此连接，使得流体在第一和第二反应部分的第二侧与第一和第二反应部分连通。 催化剂设置在第一反应部分中，并且将网层插入到第二反应部分中。

    THIN FILM TYPE SOLAR CELL AND FABRICATION METHOD THEREOF
    33.
    发明申请
    THIN FILM TYPE SOLAR CELL AND FABRICATION METHOD THEREOF 有权
    薄膜型太阳能电池及其制造方法

    公开(公告)号：US20130228218A1

    公开(公告)日：2013-09-05

    申请号：US13560951

    申请日：2012-07-27

    申请人： Sung-Chul Lee ,  Doo-Youl Lee ,  Young-Jin Kim ,  Young-Su Kim ,  Young-Soo Kim ,  Dong-Hun Lee

    发明人： Sung-Chul Lee ,  Doo-Youl Lee ,  Young-Jin Kim ,  Young-Su Kim ,  Young-Soo Kim ,  Dong-Hun Lee

    IPC分类号： H01L31/0224 ,  H01L31/18

    CPC分类号： H01L31/065 ,  H01L31/02168 ,  H01L31/022441 ,  H01L31/0682 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

    摘要： A method of fabricating a solar cell includes forming a doped portion having a first conductive type on a semiconductor substrate, growing an oxide layer on the semiconductor substrate, forming a plurality of recess portions in the oxide layer, further growing the oxide layer on the semiconductor substrate, forming a doped portion having a second conductive type on areas of the semiconductor substrate corresponding to the recess portions, forming a first conductive electrode electrically coupled to the doped portion having the first conductive type, and forming a second conductive electrode on the semiconductor substrate and electrically coupled to the doped portion having the second conductive type, wherein a gap between the doped portions having the first and second conductive types corresponds to a width of the oxide layer formed by further growing the oxide layer.

    摘要翻译： 一种制造太阳能电池的方法包括在半导体衬底上形成具有第一导电类型的掺杂部分，在半导体衬底上生长氧化物层，在氧化物层中形成多个凹陷部分，在半导体上进一步生长氧化物层 在所述半导体衬底的与所述凹部对应的区域上形成具有第二导电类型的掺杂部分，形成与所述第一导电类型的所述掺杂部分电耦合的第一导电电极，以及在所述半导体衬底上形成第二导电电极 并且电耦合到具有第二导电类型的掺杂部分，其中具有第一和第二导电类型的掺杂部分之间的间隙对应于通过进一步生长氧化物层形成的氧化物层的宽度。

    SOLAR CELL AND MANUFACTURING METHOD THEREOF
    34.
    发明申请
    SOLAR CELL AND MANUFACTURING METHOD THEREOF 审中-公开
    太阳能电池及其制造方法

    公开(公告)号：US20130104974A1

    公开(公告)日：2013-05-02

    申请号：US13620475

    申请日：2012-09-14

    申请人： Young-Su Kim ,  Dong-Seop Kim ,  Doo-Youl Lee ,  Young-Jin Kim ,  Young-Sang Park ,  Chan-Bin Mo ,  Sung-Chul Lee

    发明人： Young-Su Kim ,  Dong-Seop Kim ,  Doo-Youl Lee ,  Young-Jin Kim ,  Young-Sang Park ,  Chan-Bin Mo ,  Sung-Chul Lee

    IPC分类号： H01L31/0216

    CPC分类号： H01L31/0682 ,  H01L31/022441 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

    摘要： A solar cell includes a silicon substrate including a front surface for receiving light, and a rear surface opposite the front surface, an emitter diffusion region on the rear surface and doped with a first polarity that is opposite to a polarity of the silicon substrate, a base diffusion region on the rear surface of the substrate and doped with a second polarity that is the same as the polarity of the silicon substrate, and an insulation gap between the emitter diffusion region and the base diffusion region, wherein the base diffusion region has a closed polygonal shape, and wherein the insulation gap is adjacent the base diffusion region.

    摘要翻译： 太阳能电池包括：硅基板，包括用于接收光的前表面和与前表面相对的后表面，在后表面上的发射极扩散区域，并掺杂有与硅基板的极性相反的第一极性; 基底扩散区域，并且掺杂有与硅衬底的极性相同的第二极性，以及发射极扩散区域和基极扩散区域之间的绝缘间隙，其中，基极扩散区域具有 闭合的多边形形状，并且其中绝缘间隙与基底扩散区相邻。

    Controlling AC disturbance while programming
    36.
    发明授权
    Controlling AC disturbance while programming 有权
    在编程时控制交流干扰

    公开(公告)号：US07986562B2

    公开(公告)日：2011-07-26

    申请号：US12650118

    申请日：2009-12-30

    申请人： Sung-Yong Chung ,  Zhizheng Liu ,  Yugi Mizuguchi ,  Xuguang Alan Wang ,  Yi He ,  Ming Kwan ,  Darlene Hamilton ,  Sung-Chul Lee ,  Guowei Wang ,  Nancy Leong

    发明人： Sung-Yong Chung ,  Zhizheng Liu ,  Yugi Mizuguchi ,  Xuguang Alan Wang ,  Yi He ,  Ming Kwan ,  Darlene Hamilton ,  Sung-Chul Lee ,  Guowei Wang ,  Nancy Leong

    IPC分类号： G11C16/06

    CPC分类号： G11C16/3418 ,  G11C16/0416 ,  G11C16/24 ,  G11C16/3427

    摘要： A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation.

    摘要翻译： 提供了一种能够在与诸如程序，读取和/或擦除之类的存储器相关联的AC操作期间最小化干扰的系统和方法。 在AC操作期间，系统将存储器阵列中的所有或所需的位线子集预充电到指定的电压，以便于减少相邻单元之间的AC干扰。 可以将预充电电压施加到存储器阵列中的块中的所有位线，或者对与所选择的存储器单元相关联的位线以及与块中所选择的存储单元相邻的相邻存储单元。 该系统确保在选择存储器单元时，源极和漏极电压电平可以在相同或基本相同的时间被设置为期望的电平。 这可以有助于在AC操作期间最小化所选择的存储器单元中的AC干扰。

    CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
    38.
    发明申请
    CONTROLLING AC DISTURBANCE WHILE PROGRAMMING 有权
    控制交流干扰编程

    公开(公告)号：US20090161462A1

    公开(公告)日：2009-06-25

    申请号：US11963508

    申请日：2007-12-21

    申请人： Sung-Yong Chung ,  Zhizheng Liu ,  Yugi Mizuguchi ,  Xuguang Alan Wang ,  Yi He ,  Ming Kwan ,  Darlene Hamilton ,  Sung-Chul Lee ,  Guowei Wang ,  Nancy Leong

    发明人： Sung-Yong Chung ,  Zhizheng Liu ,  Yugi Mizuguchi ,  Xuguang Alan Wang ,  Yi He ,  Ming Kwan ,  Darlene Hamilton ,  Sung-Chul Lee ,  Guowei Wang ,  Nancy Leong

    IPC分类号： G11C7/02

    CPC分类号： G11C16/3418 ,  G11C16/0416 ,  G11C16/24 ,  G11C16/3427

    摘要： A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation.

    摘要翻译： 提供了一种能够在与诸如程序，读取和/或擦除之类的存储器相关联的AC操作期间最小化干扰的系统和方法。 在AC操作期间，系统将存储器阵列中的所有或所需的位线子集预充电到指定的电压，以便于减少相邻单元之间的AC干扰。 可以将预充电电压施加到存储器阵列中的块中的所有位线，或者对与所选择的存储器单元相关联的位线以及与块中所选择的存储单元相邻的相邻存储单元。 该系统确保在选择存储器单元时，源极和漏极电压电平可以在相同或基本相同的时间被设置为期望的电平。 这可以有助于在AC操作期间最小化所选择的存储器单元中的AC干扰。