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    METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES, AND RELATED STRUCTURES
    31.
    发明申请
    METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES, AND RELATED STRUCTURES 有权
    形成半导体器件结构的方法及相关结构

    公开(公告)号：US20130105755A1

    公开(公告)日：2013-05-02

    申请号：US13287814

    申请日：2011-11-02

    申请人： Scott E. Sills ,  Dan B. Millward

    发明人： Scott E. Sills ,  Dan B. Millward

    IPC分类号： H01L45/00 ,  H01L21/62

    CPC分类号： H01L45/1266 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1633 ,  H01L45/1658 ,  H01L45/1683

    摘要： A method of forming a semiconductor device structure. The method comprises forming a block copolymer assembly comprising at least two different domains over an electrode. At least one metal precursor is selectively coupled to the block copolymer assembly to form a metal-complexed block copolymer assembly comprising at least one metal-complexed domain and at least one non-metal-complexed domain. The metal-complexed block copolymer assembly is annealed in to form at least one metal structure. Other methods of forming a semiconductor device structures are described. Semiconductor device structures are also described.

    摘要翻译： 一种形成半导体器件结构的方法。 该方法包括在电极上形成包含至少两个不同结构域的嵌段共聚物组合物。 选择性地将至少一种金属前体偶联到嵌段共聚物组合物上以形成包含至少一个金属络合域和至少一个非金属络合域的金属络合嵌段共聚物组合物。 将金属络合的嵌段共聚物组合物退火以形成至少一种金属结构。 描述形成半导体器件结构的其它方法。 还描述了半导体器件结构。

    MEMORY CELLS AND MEMORY CELL ARRAYS
    32.
    发明申请
    MEMORY CELLS AND MEMORY CELL ARRAYS 有权
    记忆细胞和记忆细胞阵列

    公开(公告)号：US20130092894A1

    公开(公告)日：2013-04-18

    申请号：US13275168

    申请日：2011-10-17

    申请人： Scott E. Sills ,  Gurtej S. Sandhu ,  Sanh D. Tang ,  John Smythe

    发明人： Scott E. Sills ,  Gurtej S. Sandhu ,  Sanh D. Tang ,  John Smythe

    IPC分类号： H01L47/00

    CPC分类号： H01L45/1226 ,  H01L27/2409 ,  H01L27/2427 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/085 ,  H01L45/124 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/145 ,  H01L45/146 ,  H01L45/148

    摘要： Some embodiments include memory cells. The memory cells may have a first electrode, and a trench-shaped programmable material structure over the first electrode. The trench-shape defines an opening. The programmable material may be configured to reversibly retain a conductive bridge. The memory cell may have an ion source material directly against the programmable material, and may have a second electrode within the opening defined by the trench-shaped programmable material. Some embodiments include arrays of memory cells. The arrays may have first electrically conductive lines, and trench-shaped programmable material structures over the first lines. The trench-shaped structures may define openings within them. Ion source material may be directly against the programmable material, and second electrically conductive lines may be over the ion source material and within the openings defined by the trench-shaped structures.

    摘要翻译： 一些实施例包括存储器单元。 存储单元可以具有第一电极和在第一电极上方的沟槽状可编程材料结构。 沟槽形状限定开口。 可编程材料可以被配置为可逆地保持导电桥。 存储单元可以具有直接抵靠可编程材料的离子源材料，并且可以在由沟槽状可编程材料限定的开口内具有第二电极。 一些实施例包括存储器单元阵列。 阵列可以具有第一导电线，以及在第一线上的沟槽状可编程材料结构。 沟槽状结构可以在其内限定开口。 离子源材料可以直接抵靠可编程材料，并且第二导电线可以在离子源材料之上并且在由沟槽状结构限定的开口内。

    Memory Cells
    33.
    发明申请
    Memory Cells 有权

    公开(公告)号：US20130037772A1

    公开(公告)日：2013-02-14

    申请号：US13208216

    申请日：2011-08-11

    申请人： Scott E. Sills

    发明人： Scott E. Sills

    IPC分类号： H01L45/00

    CPC分类号： H01L45/1253 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1266 ,  H01L45/143 ,  H01L45/146

    摘要： Some embodiments include memory cells. A memory cell may contain a switching region and an ion source region between a pair of electrodes. The switching region may be configured to reversibly retain a conductive bridge, with the memory cell being in a low resistive state when the conductive bridge is retained within the switching region and being in a high resistive state when the conductive bridge is not within the switching region. The memory cell may contain an ordered framework extending across the switching region to orient the conductive bridge within the switching region, with the framework remaining within the switching region in both the high resistive and low resistive states of the memory cell.

    Methods of forming block copolymers
    34.
    发明授权
    Methods of forming block copolymers 有权
    形成嵌段共聚物的方法

    公开(公告)号：US08304493B2

    公开(公告)日：2012-11-06

    申请号：US12859869

    申请日：2010-08-20

    申请人： Dan B. Millward ,  Scott E. Sills

    发明人： Dan B. Millward ,  Scott E. Sills

    IPC分类号： C08F299/08 ,  C08F299/00

    CPC分类号： C08F287/00 ,  C08F8/00 ,  C08F8/42 ,  G03F7/0002 ,  C08F226/06 ,  C08F293/00

    摘要： Methods of modifying block copolymers to enhance thermodynamic properties thereof without sacrificing material properties and methods of forming modified block copolymers having desired properties are disclosed. The modified block copolymers may be used, for example, as a mask for sublithographic patterning during various stages of semiconductor device fabrication. For example, block copolymers having desirable material properties, such as etch selectively, may be chemically modified to tailor a χ value thereof to optimize the process conditions for achieving a self-assembled state and to reduce a defectivity of the self-assembled block copolymer pattern.

    摘要翻译： 公开了改性嵌段共聚物以提高其热力学性质而不牺牲材料性质的方法和形成具有所需性质的改性嵌段共聚物的方法。 改性嵌段共聚物可以用作例如在半导体器件制造的各个阶段期间用于亚光刻图案的掩模。 例如，具有期望的材料性质的嵌段共聚物，例如选择性蚀刻，可以进行化学修饰以调整其χ值，以优化用于实现自组装状态的工艺条件并降低自组装嵌段共聚物图案的缺陷 。

    Methods of forming patterns, and methods of forming integrated circuits
    36.
    发明授权
    Methods of forming patterns, and methods of forming integrated circuits 有权
    形成图案的方法，以及形成集成电路的方法

    公开(公告)号：US08273647B2

    公开(公告)日：2012-09-25

    申请号：US13288609

    申请日：2011-11-03

    申请人： Dan Millward ,  Scott E. Sills

    发明人： Dan Millward ,  Scott E. Sills

    IPC分类号： H01L21/3205 ,  H01L21/4763

    CPC分类号： H01L21/0337 ,  B81B2207/056 ,  B81C1/00031 ,  B81C2201/0149 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/32139 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/78

    摘要： Some embodiments include methods of forming patterns in substrates by utilizing block copolymer assemblies as patterning materials. A block copolymer assembly may be formed over a substrate, with the assembly having first and second subunits arranged in a pattern of two or more domains. Metal may be selectively coupled to the first subunits relative to the second subunits to form a pattern of metal-containing regions and non-metal-containing regions. At least some of the block copolymer may be removed to form a patterned mask corresponding to the metal-containing regions. A pattern defined by the patterned mask may be transferred into the substrate with one or more etches. In some embodiments, the patterning may be utilized to form integrated circuitry, such as, for example, gatelines.

    摘要翻译： 一些实施方案包括通过利用嵌段共聚物组合物作为图案形成材料在衬底中形成图案的方法。 可以在衬底上形成嵌段共聚物组件，其中组件具有以两个或多个畴的图案排列的第一和第二子单元。 金属可以相对于第二子单元选择性地耦合到第一子单元，以形成含金属的区域和非含金属的区域的图案。 可以除去至少一些嵌段共聚物以形成对应于含金属的区域的图案化掩模。 由图案化掩模限定的图案可以用一个或多个蚀刻转移到基板中。 在一些实施例中，图案化可以用于形成集成电路，例如，电视线。

    Memory Arrays And Methods Of Forming An Array Of Memory Cells
    40.
    发明申请
    Memory Arrays And Methods Of Forming An Array Of Memory Cells 有权
    记忆阵列和形成记忆单元阵列的方法

    公开(公告)号：US20130320283A1

    公开(公告)日：2013-12-05

    申请号：US13485488

    申请日：2012-05-31

    申请人： Scott E. Sills ,  D. V. Nirmal Ramaswamy

    发明人： Scott E. Sills ,  D. V. Nirmal Ramaswamy

    IPC分类号： H01L45/00 ,  H01L27/088

    CPC分类号： H01L27/2436 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/145 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1666 ,  H01L45/1691

    摘要： A method of forming an array of memory cells includes forming lines of covering material that are elevationally over and along lines of spaced sense line contacts. Longitudinal orientation of the lines of covering material is used in forming lines comprising programmable material and outer electrode material that are between and along the lines of covering material. The covering material is removed over the spaced sense line contacts and the spaced sense line contacts are exposed. Access lines are formed. Sense lines are formed that are electrically coupled to the spaced sense line contacts. The sense lines are angled relative to the lines of spaced sense line contacts and relative to the access lines. Other embodiments, including structure independent of method, are disclosed.

    摘要翻译： 形成存储单元阵列的方法包括形成沿着间隔的感测线接触线的上方并且沿其间的覆盖材料的线。 覆盖材料线的纵向定向用于形成包括可覆盖材料之间和沿着覆盖材料线的可编程材料和外部电极材料的管线。 覆盖材料在间隔开的感测线触点上被去除，并且间隔开的感测线触点被暴露。 形成访问线。 形成电感耦合到间隔开的感测线触点的感测线。 感测线相对于间隔开的感测线接触线并相对于接入线成角度。 公开了包括与方法无关的结构的其他实施例。