Semiconductor device
    31.
    发明授权

    公开(公告)号:US11901822B2

    公开(公告)日:2024-02-13

    申请号:US17612387

    申请日:2020-05-19

    CPC classification number: H02M3/1588 H01L29/7869 H02M1/346

    Abstract: A semiconductor device in which an increase in circuit area is inhibited is provided. The semiconductor device includes a first circuit layer and a second circuit layer over the first circuit layer; the first circuit layer includes a first transistor; the second circuit layer includes a second transistor; a gate of the second transistor is electrically connected to one of a source and a drain of the first transistor; a source and a drain of the second transistor are electrically connected to the other of the source and the drain of the first transistor; and a semiconductor layer of the second transistor contains a metal oxide.

    Semiconductor Device
    34.
    发明申请

    公开(公告)号:US20220302312A1

    公开(公告)日:2022-09-22

    申请号:US17642346

    申请日:2020-09-07

    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a first conductor, a second conductor, a third oxide, a fourth oxide, and a second insulator over the second oxide; a third insulator over the first conductor, the second conductor, the third oxide, and the fourth oxide; a fourth insulator over the second insulator; and a third conductor over the fourth insulator. The second insulator is positioned between the first conductor and the second conductor. The third oxide is positioned between the first conductor and the second insulator. The fourth oxide is positioned between the second conductor and the second insulator. The thickness of the third oxide between the first conductor and the second insulator is greater than or equal to 3 nm and less than or equal to 8 nm. The thickness of the fourth oxide between the second conductor and the second insulator is greater than or equal to 3 nm and less than or equal to 8 nm.

    Semiconductor device and operation method thereof

    公开(公告)号:US11430791B2

    公开(公告)日:2022-08-30

    申请号:US16959771

    申请日:2019-01-11

    Abstract: A semiconductor device capable of obtaining the threshold voltage of a transistor is provided. The semiconductor device includes a first transistor, a first capacitor, a first output terminal, a first switch, and a second switch. A gate and a source of the first transistor are electrically connected to each other. A first terminal of the first capacitor is electrically connected to the source. A second terminal and the first output terminal of the first capacitor are electrically connected to a back gate of the first transistor. The first switch controls input of a first voltage to the back gate. A second voltage is input to a drain of the first transistor. The second switch controls input of a third voltage to the source.

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