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    RESONANT LINE DRIVER INCLUDING ENERGY TRANSFER INDUCTOR FOR DRIVING CAPACITIVE-LOAD LINES
    33.
    发明申请
    RESONANT LINE DRIVER INCLUDING ENERGY TRANSFER INDUCTOR FOR DRIVING CAPACITIVE-LOAD LINES 审中-公开
    谐振线路驱动器，包括用于驱动电容负载线的能量转移电感器

    公开(公告)号：US20160048260A1

    公开(公告)日：2016-02-18

    申请号：US14825942

    申请日：2015-08-13

    Applicant: Texas Instruments Incorporated

    Inventor： Vadim V. Ivanov ,  William R. Krenik ,  Rajarshi Mukhopadhyay ,  Baher S. Haroun

    IPC: G06F3/041 ,  G06F3/044 ,  H03K3/012

    CPC classification number: G06F3/0416 ,  G06F3/044

    Abstract: A resonant line driver for driving capacitive-loads includes a driver series-coupled to an energy transfer inductor L1, driving signal energy at a signal frequency through L1. A switch array is controlled to switch L1 between multiple electrodes according to a switching sequence, each electrode characterized by a load capacitance CL. L1 and CL form a resonator circuit in which signal energy cycles between L1 and CL at the signal frequency. The switch array switches L1 between a current electrode and a next electrode at a zero_crossing when signal energy in the energy transfer inductor is at a maximum and signal energy in the load capacitance of the current electrode is at a minimum. An amplitude control loop controls signal energy delivered to the L1CL resonator circuit, and a frequency control loop controls signal frequency/phase. In an example application, the resonant driver provides line drive for a mutual capacitance touch screen.

    Abstract translation: 用于驱动电容性负载的谐振线路驱动器包括串联耦合到能量传递电感器L1的驱动器，通过L1驱动信号频率的信号能量。 控制开关阵列以根据切换顺序在多个电极之间切换L1，每个电极的特征在于负载电容CL。 L1和CL形成谐振器电路，其中信号能量在信号频率下在L1和CL之间循环。 当能量传递电感器中的信号能量处于最大值并且当前电极的负载电容中的信号能量处于最小时，开关阵列在零交叉时在当前电极和下一个电极之间切换L1。 幅度控制环路控制传送到L1CL谐振电路的信号能量，并且频率控制环路控制信号频率/相位。 在示例应用中，谐振驱动器为互电容触摸屏提供线驱动。

    TDO multiplexers series coupling augmentation instruction register with instruction registers
    34.
    发明授权
    TDO multiplexers series coupling augmentation instruction register with instruction registers 有权
    TDO多路复用器串联扩充指令寄存器与指令寄存器

    公开(公告)号：US09134376B2

    公开(公告)日：2015-09-15

    申请号：US14605329

    申请日：2015-01-26

    Applicant: Texas Instruments Incorporated

    Inventor： Baher S. Haroun ,  Lee D. Whetsel

    IPC: G01R31/28 ,  G01R31/3177

    CPC classification number: G01R31/3177 ,  G01R31/2851 ,  G01R31/318536 ,  G01R31/318544 ,  G01R31/318555 ,  G01R31/318558 ,  G11C29/46

    Abstract: An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.

    Abstract translation: 描述了用于在集成电路上测试多个电路的架构。 该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

    TAP AND LINKING MODULE FOR SCAN ACCESS OF MULTIPLE CORES WITH IEEE 1149.1 TEST ACCESS PORTS
    35.
    发明申请
    TAP AND LINKING MODULE FOR SCAN ACCESS OF MULTIPLE CORES WITH IEEE 1149.1 TEST ACCESS PORTS 审中-公开
    用于IEEE 1149.1测试访问端口的多个光纤扫描接入的TAP和链接模块

    公开(公告)号：US20150135029A1

    公开(公告)日：2015-05-14

    申请号：US14605329

    申请日：2015-01-26

    Applicant: Texas Instruments Incorporated

    Inventor： Baher S. Haroun ,  Lee D. Whetsel

    IPC: G01R31/3177

    CPC classification number: G01R31/3177 ,  G01R31/2851 ,  G01R31/318536 ,  G01R31/318544 ,  G01R31/318555 ,  G01R31/318558 ,  G11C29/46

    Abstract: An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.

    Abstract translation: 描述了用于在集成电路上测试多个电路的架构。 该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

    1149.1 TAP LINKING MODULES
    36.
    发明申请
    1149.1 TAP LINKING MODULES 审中-公开
    1149.1 TAP链接模块

    公开(公告)号：US20140215282A1

    公开(公告)日：2014-07-31

    申请号：US14230771

    申请日：2014-03-31

    Applicant: Texas Instruments Incorporated

    Inventor： Lee D. Whetsel ,  Baher S. Haroun ,  Brian J. Lasher ,  Anjali Vij

    IPC: G01R31/3177

    CPC classification number: G01R31/3177 ,  G01R31/31727 ,  G01R31/318555

    Abstract: IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.

    Abstract translation: IEEE 1149.1测试接入端口（TAP）可用于IC和知识产权核心设计级别。 TAP用作用于访问IC和核心内的各种嵌入式电路的串行通信端口，包括： IEEE 1149.1边界扫描电路，内置测试电路，内部扫描电路，IEEE 1149.4混合信号测试电路，IEEE P5001在线仿真电路和IEEE P1532系统编程电路。 可选择地访问IC内的TAP是理想的，因为在许多情况下，仅能够访问期望的TAP导致在IC内可以执行测试，仿真和编程的方式的改进。 描述了一种TAP链接模块，其允许使用1149.1指令扫描操作来选择性地访问嵌入在IC内的TAP。

    CARBON NANOTUBE DEVICES
    37.
    发明申请
    CARBON NANOTUBE DEVICES 有权

    公开(公告)号：US20250113548A1

    公开(公告)日：2025-04-03

    申请号：US18479025

    申请日：2023-09-30

    Applicant: Texas Instruments Incorporated

    Inventor： Luigi Colombo ,  Baher S. Haroun

    IPC: H01L29/786 ,  H01L21/02 ,  H01L29/06 ,  H01L29/66 ,  H01L29/775

    Abstract: A method includes forming, on a dielectric layer of an integrated circuit, a first layer of a first material, forming, on the first layer, a second layer of a second material, and patterning the second layer to expose the first layer. Via the patterned second layer, the exposed first layer is etched to form protrusion structures of the first layer and the second layer and grooves between adjacent ones of the protrusion structures. The method also includes forming a graphitic carbon layer on at least part of the second layer of the protrusion structures, and depositing carbon nanotubes into the grooves between the adjacent ones of the protrusion structures.

    Dielectric Waveguide Radar Signal Distribution
    38.
    发明申请
    Dielectric Waveguide Radar Signal Distribution 有权

    公开(公告)号：US20250105485A1

    公开(公告)日：2025-03-27

    申请号：US18975205

    申请日：2024-12-10

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Baher S. Haroun

    IPC: H01P3/16 ,  G01S7/03 ,  G01S13/931 ,  H01Q1/32

    Abstract: Radar systems are provided for transmitting radar signals using one or more flexible dielectric waveguides (DWGs), each having a core member surrounded by a cladding, in which the core and cladding have different dielectric constants. A single radar circuit may be used to generate radar signals that are distributed, via the DWGs, to multiple launch structures placed at various locations on a vehicle. In an example, a launch structure, coupled to a port of the radar circuit, has an outer surface that is configured to couple to an inner surface of a body part of an external structure to emit a radar signal through the outer surface in a path that extends through the body part, in which the body part is non-transparent to light and does not have an opening in the path of the radar signal.

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