公开(公告)号：US11387240B2

公开(公告)日：2022-07-12

申请号：US16854772

申请日：2020-04-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Kuan Lin ,  Chang-Ta Yang ,  Ping-Wei Wang ,  Kuo-Yi Chao ,  Mei-Yun Wang

IPC: H01L27/11 ,  G11C11/412 ,  H01L29/66 ,  H01L23/522 ,  H01L27/02 ,  H01L21/768

Abstract: An integrated circuit structure in which a gate overlies channel region in an active area of a first transistor. The first transistor includes a channel region, a source region and a drain region. A conductive contact is coupled to the drain region of the first transistor. A second transistor that includes a channel region, a source region a drain region is adjacent to the first transistor. The gate of the second transistor is spaced from the gate of the first transistor. A conductive via passes through an insulation layer to electrically connect to the gate of the second transistor. An expanded conductive via overlays both the conductive contact and the conductive via to electrically connect the drain of the first transistor to the gate of the second transistor.

公开(公告)号：US11056594B2

公开(公告)日：2021-07-06

申请号：US16908441

申请日：2020-06-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Kuan Lin ,  Chang-Ta Yang ,  Ping-Wei Wang

IPC: H01L29/78 ,  H01L29/66 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L21/02 ,  H01L21/308 ,  H01L21/8238

Abstract: A semiconductor device structure is provided. The structure includes a semiconductor substrate having a well pick-up region and an active region adjacent to the well pick-up region. The semiconductor device structure also includes a first fin structure with a first width and a third fin structure with a third width formed adjacent to each other in the well pick-up region and a second fin structure with a second width and a fourth fin structure with a fourth width formed adjacent to each other in the active region. The first width is different than the second width, the third width is different than the fourth width, and the first width is substantially equal to or greater than the third width.

公开(公告)号：US20210082475A1

公开(公告)日：2021-03-18

申请号：US16573769

申请日：2019-09-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jui-Lin Chen ,  Chao-Yuan Chang ,  Yu-Kuan Lin ,  Chang-Ta Yang ,  Ping-Wei Wang

IPC: G11C5/06 ,  G06F17/50 ,  H01L23/522 ,  H01L27/11 ,  H01L27/092 ,  H01L29/78

Abstract: A semiconductor device includes a gate structure, a source/drain, a first via that is disposed over the gate structure and the source/drain, and a first metal line having a more elevated vertical position than the first via in a cross-sectional view. The first via is electrically coupled to both the gate structure and the source/drain. The first metal line and the first via each extends in a first direction. A first distance separates the metal line from the via in a second direction different from the first direction. The first metal line includes a protruding portion that protrudes outwardly in the second direction.

公开(公告)号：US10943827B2

公开(公告)日：2021-03-09

申请号：US16867754

申请日：2020-05-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Chun Keng ,  Yu-Kuan Lin ,  Chang-Ta Yang ,  Ping-Wei Wang

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/08 ,  H01L21/311 ,  H01L21/3065

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin structure and a second fin structure over a semiconductor substrate. A top surface of the first fin structure is closer to the semiconductor substrate than a top surface of the second fin structure. The semiconductor device structure also includes a first epitaxial structure on the first fin structure. The semiconductor device structure further includes a second epitaxial structure on the third fin structure. The first epitaxial structure is wider than the second epitaxial structure.

公开(公告)号：US10727343B2

公开(公告)日：2020-07-28

申请号：US15988045

申请日：2018-05-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Kuan Lin ,  Chang-Ta Yang ,  Ping-Wei Wang

IPC: H01L29/78 ,  H01L29/06 ,  H01L27/092 ,  H01L29/66 ,  H01L29/423 ,  H01L21/02 ,  H01L21/308 ,  H01L21/8238

Abstract: A semiconductor device structure is provided. The structure includes a semiconductor substrate having a well pick-up region and an active region. Each of the well pick-up region and the active region includes a first well region and a second well region that have different conductivity types. There is a well boundary between the first well region and the second well region. A first fin structure is in the first well region of the well pick-up region and second fin structures are in the first well region of the active region. The minimum distance between the well boundary and the first fin structure is greater than the minimum distance between the well boundary and one of the second fin structures that is closest to the well boundary.

公开(公告)号：US10515969B2

公开(公告)日：2019-12-24

申请号：US15354052

申请日：2016-11-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jordan Hsu ,  Yu-Kuan Lin ,  Shau-Wei Lu ,  Chang-Ta Yang ,  Ping-Wei Wang ,  Kuo-Hung Lo

IPC: H01L27/11 ,  H01L27/092 ,  H01L29/66 ,  H01L27/088 ,  H01L27/105 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/49

Abstract: A semiconductor device includes a substrate, a first transistor, and a second transistor. The first transistor is disposed on the substrate. The second transistor is disposed on the substrate. A gate of the first transistor and a gate of the second transistor are integrally formed, and the first transistor and the second transistor have different threshold voltages.