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公开(公告)号:US20220013407A1
公开(公告)日:2022-01-13
申请号:US16924200
申请日:2020-07-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Hsin Chan , Jiing-Feng Yang , Kuan-Wei Huang , Meng-Shu Lin , Yu-Yu Chen , Chia-Wei Wu , Chang-Wen Chen , Wei-Hao Lin , Ching-Yu Chang
IPC: H01L21/768 , H01L23/528 , H01L21/033
Abstract: A semiconductor structure and method of forming the same are provided. The method includes: forming a plurality of mandrel patterns over a dielectric layer; forming a first spacer and a second spacer on sidewalls of the plurality of mandrel patterns, wherein a first width of the first spacer is larger than a second width of the second spacer; removing the plurality of mandrel patterns; patterning the dielectric layer using the first spacer and the second spacer as a patterning mask; and forming conductive lines laterally aside the dielectric layer.
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公开(公告)号:US20190051523A1
公开(公告)日:2019-02-14
申请号:US16163878
申请日:2018-10-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kuan-Wei Huang , Chia-Ying Lee , Ming-Chung Liang
IPC: H01L21/033 , H01L27/11 , H01L21/768 , H01L21/461
Abstract: The present disclosure, in some embodiments, relates to a method of performing an etch process. The method is performed by forming a first plurality of openings defined by first sidewalls of a mask disposed over a substrate. A cut layer is between two of the first plurality of openings. A spacer is formed onto the first sidewalls of the mask and a second plurality of openings are formed. The second plurality of openings are defined by second sidewalls of the mask and are separated by the spacer. The substrate is etched according to the mask and the spacer.
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公开(公告)号:US09425049B2
公开(公告)日:2016-08-23
申请号:US14154439
申请日:2014-01-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kuan-Wei Huang , Chia-Ying Lee , Ming-Chung Liang
IPC: H01L21/44 , H01L21/311 , H01L21/033
CPC classification number: H01L21/0337 , H01L21/0332 , H01L21/0335 , H01L21/0338 , H01L21/461 , H01L21/76816 , H01L27/1116
Abstract: The present disclosure relates to a method for performing a self-aligned litho-etch (SALE) process. In some embodiments, the method is performed by forming a first cut layer over a substrate having a multi-layer hard mask with a first layer and an underlying second layer. A first plurality of openings, cut according to the first cut layer, are formed to expose the second layer at a first plurality of positions corresponding to a first plurality of shapes of a SALE design layer. A spacer material is deposited onto sidewalls of the multi-layer hard mask to form a second cut layer. A second plurality of openings, cut according to the second cut layer, are formed to expose the second layer at a second plurality of positions corresponding to a second plurality of shapes of the SALE design layer. The second layer is etched according to the first and second plurality of openings.
Abstract translation: 本公开涉及一种用于执行自对准光刻蚀(SALE)工艺的方法。 在一些实施例中,通过在具有第一层和下层第二层的多层硬掩模的衬底上形成第一切割层来执行该方法。 形成根据第一切割层切割的第一多个开口,以在对应于SALE设计层的第一多个形状的第一多个位置处暴露第二层。 将间隔物材料沉积在多层硬掩模的侧壁上以形成第二切割层。 形成根据第二切割层切割的第二多个开口,以在对应于SALE设计层的第二多个形状的第二多个位置处露出第二层。 根据第一和第二多个开口蚀刻第二层。
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公开(公告)号:US09368349B2
公开(公告)日:2016-06-14
申请号:US14154454
申请日:2014-01-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kuan-Wei Huang , Chia-Ying Lee , Ming-Chung Liang
IPC: H01L21/033 , H01L27/11
CPC classification number: H01L21/0338 , H01L21/0332 , H01L21/0335 , H01L21/0337 , H01L27/11
Abstract: The present disclosure relates to a method of performing a self-aligned litho-etch (SALE) process. In some embodiments, the method is performed by forming a spacer material over a substrate having a multi-layer hard mask with a first layer and an underlying second layer to provide a first cut layer, and forming a reverse material over the spacer material to form a second cut layer. A second plurality of openings, cut according to the second cut layer, are formed to expose the second layer at a positions corresponding to a second plurality of shapes of a SALE design layer. A first plurality of openings, cut according to the first cut layer, are formed to expose the second layer at a positions corresponding to a first plurality of shapes of the SALE design layer. The second layer is etched according to the first and second plurality of openings.
Abstract translation: 本公开内容涉及执行自对准光刻蚀(SALE)工艺的方法。 在一些实施例中,通过在具有第一层和下面的第二层的多层硬掩模的衬底上形成隔离材料来实现该方法,以提供第一切割层,并在间隔物材料上形成反向材料以形成 第二切割层。 形成根据第二切割层切割的第二多个开口,以在对应于SALE设计层的第二多个形状的位置处露出第二层。 形成根据第一切割层切割的第一多个开口,以在对应于SALE设计层的第一多个形状的位置处露出第二层。 根据第一和第二多个开口蚀刻第二层。
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公开(公告)号:US20150200095A1
公开(公告)日:2015-07-16
申请号:US14154439
申请日:2014-01-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kuan-Wei Huang , Chia-Ying Lee , Ming-Chung Liang
IPC: H01L21/033 , H01L27/11
CPC classification number: H01L21/0337 , H01L21/0332 , H01L21/0335 , H01L21/0338 , H01L21/461 , H01L21/76816 , H01L27/1116
Abstract: The present disclosure relates to a method for performing a self-aligned litho-etch (SALE) process. In some embodiments, the method is performed by forming a first cut layer over a substrate having a multi-layer hard mask with a first layer and an underlying second layer. A first plurality of openings, cut according to the first cut layer, are formed to expose the second layer at a first plurality of positions corresponding to a first plurality of shapes of a SALE design layer. A spacer material is deposited onto sidewalls of the multi-layer hard mask to form a second cut layer. A second plurality of openings, cut according to the second cut layer, are formed to expose the second layer at a second plurality of positions corresponding to a second plurality of shapes of the SALE design layer. The second layer is etched according to the first and second plurality of openings.
Abstract translation: 本公开涉及一种用于执行自对准光刻蚀(SALE)工艺的方法。 在一些实施例中,通过在具有第一层和下层第二层的多层硬掩模的衬底上形成第一切割层来执行该方法。 形成根据第一切割层切割的第一多个开口,以在对应于SALE设计层的第一多个形状的第一多个位置处露出第二层。 将间隔物材料沉积在多层硬掩模的侧壁上以形成第二切割层。 形成根据第二切割层切割的第二多个开口,以在对应于SALE设计层的第二多个形状的第二多个位置处露出第二层。 根据第一和第二多个开口蚀刻第二层。
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