公开(公告)号：US07537978B2

公开(公告)日：2009-05-26

申请号：US11717068

申请日：2007-03-13

申请人： Atsushi Yagishita ,  Ichiro Mizushima ,  Tsutomu Sato

发明人： Atsushi Yagishita ,  Ichiro Mizushima ,  Tsutomu Sato

IPC分类号： H01L21/00

CPC分类号： H01L29/66772 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66545 ,  H01L29/78639 ,  H01L29/78648

摘要： A semiconductor device comprises a support layer made of semiconductor, a diffusion layer formed by implanting impurities in a surface layer of the support layer, a buried insulating layer provided on the diffusion layer, an island-like active layer provided on the buried insulating layer, a channel region formed in the active layer, source and drain regions formed in the active layer, sandwiching the channel region, a gate insulating film formed on the channel region, a gate electrode formed on the gate insulating film and on side surfaces of the island-like active layer, and insulated and isolated from the channel, source, and drain regions, and an electrode connected to the active layer.

摘要翻译： 半导体器件包括由半导体制成的支撑层，通过在支撑层的表面层中注入杂质形成的扩散层，设置在扩散层上的掩埋绝缘层，设置在掩埋绝缘层上的岛状有源层， 形成在有源层中的沟道区域，形成在有源层中的源极和漏极区域，夹持沟道区域，形成在沟道区域上的栅极绝缘膜，形成在栅极绝缘膜上的栅电极和岛的侧表面 类型的有源层，并且与沟道，源极和漏极区域绝缘和隔离，以及连接到有源层的电极。

公开(公告)号：US07521300B2

公开(公告)日：2009-04-21

申请号：US11455735

申请日：2006-06-20

申请人： Hajime Nagano ,  Takashi Yamada ,  Tsutomu Sato ,  Ichiro Mizushima ,  Hisato Oyamatsu

发明人： Hajime Nagano ,  Takashi Yamada ,  Tsutomu Sato ,  Ichiro Mizushima ,  Hisato Oyamatsu

IPC分类号： H01L21/762

CPC分类号： H01L27/1203 ,  H01L21/84

摘要： A method of manufacturing a semiconductor device substrate includes forming a mask layer pattern on a semiconductor layer insulated from a surface of a semiconductor substrate by an electrically insulating layer, etching the semiconductor layer according to the pattern of the mask layer to form a trench leading to the insulating layer, etching a protective layer on the semiconductor substrate having a thickness less than the thickness of the insulating layer to form a sidewall protective film which covers a side surface of the trench, etching the insulating layer from a bottom surface of the trench to the semiconductor substrate; and growing a single-crystalline layer from the surface of the semiconductor substrate exposed as a result of etching the insulating layer.

摘要翻译： 一种制造半导体器件基板的方法包括：通过电绝缘层在与半导体衬底的表面绝缘的半导体层上形成掩模层图案，根据掩模层的图案蚀刻半导体层，形成通向 绝缘层，蚀刻具有小于绝缘层厚度的厚度的半导体衬底上的保护层，以形成覆盖沟槽侧表面的侧壁保护膜，从沟槽的底表面蚀刻绝缘层至 半导体衬底; 以及从蚀刻绝缘层而暴露的半导体衬底的表面生长单晶层。

公开(公告)号：US07510945B2

公开(公告)日：2009-03-31

申请号：US11907354

申请日：2007-10-11

申请人： Hajime Nagano ,  Shinichi Nitta ,  Takashi Yamada ,  Tsutomu Sato ,  Katsujiro Tanzawa ,  Ichiro Mizushima

发明人： Hajime Nagano ,  Shinichi Nitta ,  Takashi Yamada ,  Tsutomu Sato ,  Katsujiro Tanzawa ,  Ichiro Mizushima

IPC分类号： H01L21/76 ,  H01L21/46

CPC分类号： H01L21/84 ,  H01L21/76251 ,  H01L27/10829 ,  H01L27/10894 ,  H01L27/1203 ,  Y10S438/977

摘要： A support-side substrate having a thermal oxide film on the major surface is bonded to an active-layer-side substrate having a thermal oxide film on the major surface while making the major surfaces oppose each other. The active-layer-side substrate and part of the oxide film are selectively etched from a surface opposite to the major surface of the active-layer-side substrate to a halfway depth of the buried oxide film formed from the thermal oxide films at the bonding portion. A sidewall insulating film is formed on the etching side surface portion of the active-layer-side substrate. Then, the remaining buried oxide film except that immediately under the active-layer-side substrate is selectively etched. A single-crystal semiconductor layer is formed on the support-side substrate exposed by removing the buried oxide film.

摘要翻译： 在主表面上具有热氧化膜的支撑侧基板在主表面上具有热氧化膜的有源层侧基板上接合，同时使主表面彼此相对。 有源层侧基板和氧化膜的一部分从与有源层侧基板的主表面相反的表面选择性地蚀刻到由热氧化膜形成的掩埋氧化膜的中间深度 一部分。 在有源层侧基板的蚀刻侧面部形成有侧壁绝缘膜。 然后，选择性地蚀刻除有源层侧基板之下的剩余的掩埋氧化膜。 通过去除掩埋氧化膜而暴露的支撑侧基板上形成单晶半导体层。

公开(公告)号：US07507634B2

公开(公告)日：2009-03-24

申请号：US11812490

申请日：2007-06-19

申请人： Tsutomu Sato ,  Mie Matsuo ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Shinichi Takagi

发明人： Tsutomu Sato ,  Mie Matsuo ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Shinichi Takagi

IPC分类号： H01L21/764 ,  H01L27/12

CPC分类号： H01L27/10805 ,  B82Y20/00 ,  G02B6/122 ,  G02B6/1225 ,  G02B2006/12097 ,  H01L21/3247 ,  H01L21/7624 ,  H01L21/76283 ,  H01L21/76289 ,  H01L21/764 ,  H01L21/84 ,  H01L27/10894 ,  H01L27/10897 ,  H01L27/12 ,  H01L27/1203 ,  H01L29/0657 ,  H01L29/7842 ,  H01L29/78603 ,  H01L29/78639

摘要： To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.

摘要翻译： 通过在半导体衬底的表面上二维地形成沟槽，然后对半导体衬底进行热处理，将多个沟槽改变为一个平坦的空间。

公开(公告)号：US20080012078A1

公开(公告)日：2008-01-17

申请号：US11849682

申请日：2007-09-04

申请人： Tsutomu Sato ,  Hajime Nagano ,  Ichiro Mizushima ,  Takashi Yamada ,  Yuso Udo ,  Shinichi Nitta

发明人： Tsutomu Sato ,  Hajime Nagano ,  Ichiro Mizushima ,  Takashi Yamada ,  Yuso Udo ,  Shinichi Nitta

IPC分类号： H01L27/01

CPC分类号： H01L21/764 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/76289 ,  H01L21/823412 ,  H01L21/823481 ,  H01L21/84 ,  H01L27/10897 ,  H01L27/1203 ,  H01L27/1207

摘要： A semiconductor device including a first semiconductor layer formed on a semiconductor substrate, a second semiconductor layer surrounding the first semiconductor layer, the second semiconductor layer being formed on the semiconductor substrate with one of an insulating film and a cavity, and a third semiconductor layer surrounding the second semiconductor layer, the third semiconductor layer being formed on the semiconductor substrate.

摘要翻译： 一种半导体器件，包括形成在半导体衬底上的第一半导体层，围绕第一半导体层的第二半导体层，在半导体衬底上形成有绝缘膜和空腔中的一个的第二半导体层和围绕 所述第二半导体层，所述第三半导体层形成在所述半导体衬底上。

公开(公告)号：US07285825B2

公开(公告)日：2007-10-23

申请号：US10407677

申请日：2003-04-07

申请人： Hajime Nagano ,  Shinichi Nitta ,  Takashi Yamada ,  Tsutomu Sato ,  Katsujiro Tanzawa ,  Ichiro Mizushima

发明人： Hajime Nagano ,  Shinichi Nitta ,  Takashi Yamada ,  Tsutomu Sato ,  Katsujiro Tanzawa ,  Ichiro Mizushima

IPC分类号： H01L27/01 ,  H01L27/12 ,  H01L31/0392

CPC分类号： H01L21/84 ,  H01L21/76251 ,  H01L27/10829 ,  H01L27/10894 ,  H01L27/1203 ,  Y10S438/977

摘要： A support-side substrate having a thermal oxide film on the major surface is bonded to an active-layer-side substrate having a thermal oxide film on the major surface while making the major surfaces oppose each other. The active-layer-side substrate and part of the oxide film are selectively etched from a surface opposite to the major surface of the active-layer-side substrate to a halfway depth of the buried oxide film formed from the thermal oxide films at the bonding portion. A sidewall insulating film is formed on the etching side surface portion of the active-layer-side substrate. Then, the remaining buried oxide film except that immediately under the active-layer-side substrate is selectively etched. A single-crystal semiconductor layer is formed on the support-side substrate exposed by removing the buried oxide film.

摘要翻译： 在主表面上具有热氧化膜的支撑侧基板在主表面上具有热氧化膜的有源层侧基板上接合，同时使主表面彼此相对。 有源层侧基板和氧化膜的一部分从与有源层侧基板的主表面相反的表面选择性地蚀刻到由热氧化膜形成的掩埋氧化膜的中间深度 一部分。 在有源层侧基板的蚀刻侧面部形成有侧壁绝缘膜。 然后，选择性地蚀刻除有源层侧基板之下的剩余的掩埋氧化膜。 通过去除掩埋氧化膜而暴露的支撑侧基板上形成单晶半导体层。

公开(公告)号：US07235456B2

公开(公告)日：2007-06-26

申请号：US11340594

申请日：2006-01-27

申请人： Tsutomu Sato ,  Mie Matsuo ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Shinichi Takagi

发明人： Tsutomu Sato ,  Mie Matsuo ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Shinichi Takagi

IPC分类号： H01L21/764 ,  H01L27/12

CPC分类号： H01L27/10805 ,  B82Y20/00 ,  G02B6/122 ,  G02B6/1225 ,  G02B2006/12097 ,  H01L21/3247 ,  H01L21/7624 ,  H01L21/76283 ,  H01L21/76289 ,  H01L21/764 ,  H01L21/84 ,  H01L27/10894 ,  H01L27/10897 ,  H01L27/12 ,  H01L27/1203 ,  H01L29/0657 ,  H01L29/7842 ,  H01L29/78603 ,  H01L29/78639

摘要： To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.

摘要翻译： 通过在半导体衬底的表面上二维地形成沟槽，然后对半导体衬底进行热处理，将多个沟槽改变为一个平坦的空间。

公开(公告)号：US07019364B1

公开(公告)日：2006-03-28

申请号：US09650748

申请日：2000-08-30

申请人： Tsutomu Sato ,  Mie Matsuo ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Shinichi Takagi

发明人： Tsutomu Sato ,  Mie Matsuo ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Shinichi Takagi

IPC分类号： H01L27/12

CPC分类号： H01L27/10805 ,  B82Y20/00 ,  G02B6/122 ,  G02B6/1225 ,  G02B2006/12097 ,  H01L21/3247 ,  H01L21/7624 ,  H01L21/76283 ,  H01L21/76289 ,  H01L21/764 ,  H01L21/84 ,  H01L27/10894 ,  H01L27/10897 ,  H01L27/12 ,  H01L27/1203 ,  H01L29/0657 ,  H01L29/7842 ,  H01L29/78603 ,  H01L29/78639

摘要： To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.

摘要翻译： 通过在半导体衬底的表面上二维地形成沟槽，然后对半导体衬底进行热处理，将多个沟槽改变为一个平坦的空间。

公开(公告)号：US07018904B2

公开(公告)日：2006-03-28

申请号：US10921273

申请日：2004-08-19

申请人： Takashi Yamada ,  Hajime Nagano ,  Ichiro Mizushima ,  Tsutomu Sato ,  Hisato Oyamatsu ,  Shinichi Nitta

发明人： Takashi Yamada ,  Hajime Nagano ,  Ichiro Mizushima ,  Tsutomu Sato ,  Hisato Oyamatsu ,  Shinichi Nitta

IPC分类号： H01L21/76 ,  H01L21/20

CPC分类号： H01L27/10894 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/10832 ,  H01L27/10861 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor chip comprises a base substrate, a bulk device region having a bulk growth layer on a part of the base substrate, an SOI device region having a buried insulator on the base substrate and a silicon layer on the buried insulator, and a boundary layer located at the boundary between the bulk device region and the SOI device region. The bulk device region has a first device-fabrication surface in which a bulk device is positioned on the bulk growth layer. The SOI device region has a second device-fabrication surface in which an SOI device is positioned on the silicon layer. The first and second device-fabrication surfaces are positioned at a substantially uniform level.

公开(公告)号：US07009273B2

公开(公告)日：2006-03-07

申请号：US10665614

申请日：2003-09-19

申请人： Kazumi Inoh ,  Hidemi Ishiuchi ,  Satoshi Matsuda ,  Ichiro Mizushima ,  Tsutomu Sato

发明人： Kazumi Inoh ,  Hidemi Ishiuchi ,  Satoshi Matsuda ,  Ichiro Mizushima ,  Tsutomu Sato

IPC分类号： H01L29/00

CPC分类号： H01L27/10894 ,  H01L21/76283 ,  H01L21/76289 ,  H01L21/764 ,  H01L21/84 ,  H01L27/0218 ,  H01L27/105 ,  H01L27/10829 ,  H01L27/1087 ,  H01L27/10885 ,  H01L27/10897 ,  H01L27/11 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/66181 ,  H01L29/7841

摘要： A semiconductor device includes a semiconductor substrate, cavities, and an element isolating region. The cavities, which are each shaped like a flat plate, are made in the semiconductor substrate. The element isolating region is formed in the surface of the semiconductor substrate and located at the sides of the cavities.