公开(公告)号：US20170352610A1

公开(公告)日：2017-12-07

申请号：US15673212

申请日：2017-08-09

Applicant: UTAC Headquarters PTE. LTD.

Inventor： Saravuth Sirinorakul ,  Suebphong Yenrudee

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/78 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L21/4825 ,  H01L21/481 ,  H01L21/4828 ,  H01L21/4842 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4867 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49527 ,  H01L23/49534 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49558 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/49805 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/48091 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2224/45664 ,  H01L2224/45644

Abstract: Embodiments of the present invention are directed to a method of manufacturing a semiconductor package with an internal routing circuit. The internal routing circuit is formed from multiple molding routing layers in a plated and etched copper terminal semiconductor package by using a laser to blast away un-designed conductive areas to create conductive paths on each molding compound layer of the semiconductor package.

公开(公告)号：US20170352555A1

公开(公告)日：2017-12-07

申请号：US15674449

申请日：2017-08-10

Applicant: UTAC Headquarters PTE. LTD.

Inventor： Saravuth Sirinorakul ,  Suebphong Yenrudee

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L23/495

CPC classification number: H01L21/4828 ,  H01L21/481 ,  H01L21/4825 ,  H01L21/4842 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4867 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49527 ,  H01L23/49534 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49558 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/49805 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/48091 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2224/45664 ,  H01L2224/45644

Abstract: Embodiments of the present invention are directed to a method of manufacturing a semiconductor package with an internal routing circuit. The internal routing circuit is formed from multiple molding routing layers in a plated and etched copper terminal semiconductor package by using an inkjet process to create conductive paths on each molding compound layer of the semiconductor package.

公开(公告)号：US20170352554A1

公开(公告)日：2017-12-07

申请号：US15667433

申请日：2017-08-02

Applicant: UTAC Headquarters PTE. LTD.

Inventor： Saravuth Sirinorakul ,  Suebphong Yenrudee

IPC: H01L21/48 ,  H01L23/495

CPC classification number: H01L21/4825 ,  H01L21/481 ,  H01L21/4828 ,  H01L21/4842 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4867 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49527 ,  H01L23/49534 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49558 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/49805 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/48091 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2224/45664 ,  H01L2224/45644

Abstract: Embodiments of the present invention are directed to a method of manufacturing a semiconductor package with an internal routing circuit. The internal routing circuit is formed from multiple molding routing layers in a plated and etched copper terminal semiconductor package by using a laser to activate areas of each molding compound layer of the semiconductor package. Each compound filler in the molding compound layer has a metal interior and an insulating outermost shell. The activated molding compound areas in the molding compound layer become metallized in an electroless plating solution to build conductive paths on the molding compound surface, while properties of non-activated molding compound areas are not changed.