RELIABLE SEMICONDUCTOR PACKAGES
    1.
    发明申请

    公开(公告)号:US20240421169A1

    公开(公告)日:2024-12-19

    申请号:US18820297

    申请日:2024-08-30

    Abstract: A semiconductor package and method for forming thereof are disclosed. The package includes a package substrate having a die region with a die attached thereto. An encapsulant is disposed to cover encapsulation region of the package substrate. A protective cover is disposed over the die and attached to the encapsulant by a cover adhesive. The protective cover is supported by a lower portion of step shaped inner encapsulant sidewalls.

    Reliable semiconductor packages
    2.
    发明授权

    公开(公告)号:US12166050B2

    公开(公告)日:2024-12-10

    申请号:US17478978

    申请日:2021-09-20

    Abstract: A semiconductor package and a method of manufacturing thereof is disclosed. The package includes a package substrate having a die attach region with a die attached thereto. A protective cover with a cover adhesive is disposed over a sensor region of the die and attached to the die by the cover adhesive. The cover adhesive is disposed in a cap bonding region of the protective cover.

    FRAME MASK FOR SINGULATING WAFERS BY PLASMA ETCHING

    公开(公告)号:US20230154795A1

    公开(公告)日:2023-05-18

    申请号:US18054547

    申请日:2022-11-11

    CPC classification number: H01L21/78 H01L21/3086 H01L21/3085 H01L21/3081

    Abstract: The present disclosure relates to plasma dicing of wafer. More specifically, the present disclosure is directed to frame masks and methods for plasma dicing wafers utilizing frame masks. The frame mask includes a mask frame, wherein the mask frame includes a top ring mask support and a side ring mask support. A plurality of mask segments suspended from the top ring mask support by segment supports, the mask segments are configured to define dicing channels on a blank wafer. The frame mask is configured to removably sit onto a frame lift assembly in a plasma chamber of a plasma dicing tool, when fitted onto the frame lift assembly, the mask segments are disposed above a wafer on a wafer ring frame for plasma dicing. The mask frame is configured to enable flow of plasma therethrough to the wafer to etch the wafer to form dicing channels defined by the mask segments.

    Semiconductor Device and Method of Forming Leadframe with Clip Bond for Electrical Interconnect

    公开(公告)号:US20220208686A1

    公开(公告)日:2022-06-30

    申请号:US17643244

    申请日:2021-12-08

    Abstract: A semiconductor device has a leadframe and a first electrical component including a first surface disposed on the leadframe. A first clip bond is disposed over a second surface of the first electrical component. The first clip bond extends vertically through the semiconductor device. The first clip bond has a vertical member, horizontal member connected to the vertical member, die contact integrated with the horizontal member, and clip foot extending from the vertical member. A second electrical component has a first surface disposed on the first clip bond. A second clip bond is disposed over a second surface of the second electrical component opposite the first surface of the second electrical component. An encapsulant is deposited around the first electrical component and first clip bond. A second electrical component is disposed over the encapsulant. The clip foot is exposed from the encapsulant.

    SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

    公开(公告)号:US20220028762A1

    公开(公告)日:2022-01-27

    申请号:US17495788

    申请日:2021-10-06

    Abstract: An embodiment related to a device. The device includes a first die with first and second die surfaces. The second die surface is bonded to a first die attach pad (DAP) disposed on a first substrate surface of a package substrate and the first die surface includes a first die contact pad. The device also includes a first clip bond including a first clip bond horizontal planar portion attached to the first die contact pad on the first die surface, and a first clip bond vertical portion disposed on an edge of the first clip bond horizontal planar portion. The first clip bond vertical portion is attached to a first substrate bond pad on the first substrate surface. The device further includes a first conductive clip-die bonding layer with spacers on the first die contact pad of the first die. The first conductive clip-die bonding layer bonds the first clip bond horizontal planar portion to the first die contact pad, and the spacers maintain a uniform Bond Line Thickness (BLT) of the first conductive clip-die bonding layer.

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