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公开(公告)号：US10068847B2
公开(公告)日：2018-09-04
申请号：US15468087
申请日：2017-03-23
发明人： Yu-Hua Chen , Wei-Chung Lo , Dyi-Chung Hu , Chang-Hong Hsieh
IPC分类号： H01L29/00 , H01L23/522 , H01L23/498 , H01L21/48 , H01L25/04
摘要： A package substrate and a method of fabricating the package substrate are provided. The package substrate includes a substrate having a first surface including a plurality of conductive pads and a second surface; an insulating protective layer formed on the first surface of the substrate; an interposer embedded in and exposed from the insulating protective layer; and at least a passive component provided on the first surface of the substrate. The insulating protective layer includes at least an opening for exposing at least one of the conductive pads, and the at least the passive component is directly provided on the conductive pad exposed from the opening.
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公开(公告)号：US09860980B1
公开(公告)日：2018-01-02
申请号：US15273672
申请日：2016-09-22
发明人： Yu-Chung Hsieh , Chun-Hsien Chien , Wei-Ti Lin , Yu-Hua Chen
CPC分类号： H05K1/0306 , H05K1/0271 , H05K3/0052 , H05K3/4605 , H05K3/4688 , H05K2201/0154 , H05K2201/0175 , H05K2201/068 , H05K2201/09845
摘要： A circuit board element includes a glass substrate, a first dielectric layer, and a first patterned metal layer. The glass substrate has an edge. The first dielectric layer is disposed on the glass substrate and has a central region and an edge region. The edge region is in contact with the edge of the glass substrate, and the thickness of the central region is greater than the thickness of the edge region. The first patterned metal layer is disposed on the glass substrate and in the central region of the first dielectric layer.
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公开(公告)号：US20160268206A1
公开(公告)日：2016-09-15
申请号：US14644197
申请日：2015-03-10
发明人： Dyi-Chung Hu , Yin-Po Hung , Ra-Min Tain , Yu-Hua Chen
IPC分类号： H01L23/538 , H01L21/768
CPC分类号： H01L21/76879 , H01L21/486 , H01L21/76898 , H01L23/481 , H01L23/49827
摘要： An interconnection structure and a manufacturing method thereof are provided. The interconnection structure includes a substrate, a conductive through via, a dielectric layer, and a conductive layer. The substrate has a first surface and a second surface opposite to each other. The conductive through via is disposed in the substrate and extended from the first surface beyond the second surface. The dielectric layer is disposed on the substrate, wherein the dielectric layer has an opening exposing a portion of the conductive through via. The top surface of the conductive through via protrudes from the bottom surface of the opening. The conductive layer is disposed in the opening and connected to the conductive through via.
摘要翻译： 提供互连结构及其制造方法。 互连结构包括衬底，导电通孔，电介质层和导电层。 基板具有彼此相对的第一表面和第二表面。 导电通孔设置在基板中并从第一表面延伸超过第二表面。 介电层设置在基板上，其中电介质层具有露出导电通孔的一部分的开口。 导电通孔的顶表面从开口的底表面突出。 导电层设置在开口中并连接到导电通孔。
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公开(公告)号：US11791256B2
公开(公告)日：2023-10-17
申请号：US17095742
申请日：2020-11-12
发明人： Yu-Hua Chen , Wei-Chung Lo , Dyi-Chung Hu , Chang-Hong Hsieh
IPC分类号： H01L29/00 , H01L23/522 , H01L23/498 , H01L21/48 , H01L25/04
CPC分类号： H01L23/5226 , H01L21/4857 , H01L23/49822 , H01L23/49833 , H01L23/49838 , H01L25/04 , H01L2924/0002 , H01L2924/0002 , H01L2924/00
摘要： A package substrate includes a substrate, an interposer and an insulating protective layer. The substrate has a first surface and a second surface opposing to the first surface. The first surface includes a plurality of first conductive pads. The interposer is disposed on the first surface of the substrate such that the first conductive pads are partially covered by the interposer. The interposer includes a plurality of penetrating conductive vias electrically connected to the substrate. The insulating protective layer is disposed on the first surface of the substrate and surrounding the interposer. The insulating protective layer includes at least one penetrating conductive column, wherein a first width of the respective penetrating conductive column is greater than a second width of each of the penetrating conductive vias of the interposer.
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公开(公告)号：US11532543B2
公开(公告)日：2022-12-20
申请号：US17402635
申请日：2021-08-16
发明人： Wei-Ti Lin , Chun-Hsien Chien , Yu-Hua Chen
IPC分类号： H05K1/03 , H01L23/498 , H01L21/48 , H05K1/18
摘要： A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.
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公开(公告)号：US20210066189A1
公开(公告)日：2021-03-04
申请号：US17095742
申请日：2020-11-12
发明人： Yu-Hua Chen , Wei-Chung Lo , Dyi-Chung Hu , Chang-Hong HSIEH
IPC分类号： H01L23/522 , H01L23/498 , H01L21/48 , H01L25/04
摘要： A package substrate includes a substrate, an interposer and an insulating protective layer. The substrate has a first surface and a second surface opposing to the first surface. The first surface includes a plurality of first conductive pads. The interposer is disposed on the first surface of the substrate such that the first conductive pads are partially covered by the interposer. The interposer includes a plurality of penetrating conductive vias electrically connected to the substrate. The insulating protective layer is disposed on the first surface of the substrate and surrounding the interposer. The insulating protective layer includes at least one penetrating conductive column, wherein a first width of the respective penetrating conductive column is greater than a second width of each of the penetrating conductive vias of the interposer.
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37.发明授权公开(公告)号：US10854803B2
公开(公告)日：2020-12-01
申请号：US16842716
申请日：2020-04-07
发明人： Pei-Wei Wang , Cheng-Ta Ko , Yu-Hua Chen , De-Shiang Liu , Tzyy-Jang Tseng
IPC分类号： H01L33/62
摘要： A manufacturing method of a light emitting device package structure is provided. The method includes following operations: (i) providing a circuit redistribution structure; (ii) providing a first substrate; (iii) forming a circuit layer structure over the first substrate, wherein the circuit layer structure includes a first circuit layer; (iv) before or after operation (iii), placing a light emitting device between the first substrate and the circuit layer structure or over the circuit layer structure, wherein the light emitting device is electrically connected with the first circuit layer; and (v) placing the circuit redistribution structure over the light emitting device, wherein the circuit redistribution structure includes a first redistribution layer, a second redistribution layer, and a chip, and the first redistribution layer includes a second circuit layer and a conductive contact that contacts the second circuit layer.
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公开(公告)号：US10651358B2
公开(公告)日：2020-05-12
申请号：US16140563
申请日：2018-09-25
发明人： Pei-Wei Wang , Cheng-Ta Ko , Yu-Hua Chen , De-Shiang Liu , Tzyy-Jang Tseng
IPC分类号： H01L33/62
摘要： A light emitting device package structure includes a substrate, a circuit layer structure, a light emitting device, a first redistribution layer, a conductive connector, a second redistribution layer, and a chip. The circuit layer structure is disposed over the substrate, and the circuit layer structure includes a first circuit layer. The light emitting device is disposed over the circuit layer structure and is electrically connected with the first circuit layer. The first redistribution layer is disposed over the light emitting device and includes a second circuit layer and a conductive contact contacting the second circuit layer. The conductive connector connects the first circuit layer and the second circuit layer. The second redistribution layer is disposed over the first redistribution layer and includes a third circuit layer contacting the conductive contact. The chip is disposed over the second redistribution layer and is electrically connected with the third circuit layer.
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公开(公告)号：US10588214B2
公开(公告)日：2020-03-10
申请号：US16543609
申请日：2019-08-18
发明人： Tzyy-Jang Tseng , Kai-Ming Yang , Pu-Ju Lin , Cheng-Ta Ko , Yu-Hua Chen
摘要： A stacked structure includes a circuit board, an electronic component, metallic cores, and insulating cladding layers. The circuit board includes first bonding pads. The electronic component includes second bonding pads that are opposite to the first bonding pads. Each metallic core is connected to a corresponding first bonding pad and a corresponding second bonding pad. The metallic cores have a curved surface interposed between the corresponding first bonding pad and the corresponding second bonding pad. The insulating cladding layers are separated from each other and cover the curved surfaces of the metallic cores.
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公开(公告)号：US20200043890A1
公开(公告)日：2020-02-06
申请号：US16152424
申请日：2018-10-05
发明人： Tzyy-Jang Tseng , Cheng-Ta Ko , Kai-Ming Yang , Yu-Hua Chen
IPC分类号： H01L23/00 , H01L23/498 , H01L21/48
摘要： A package structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The pads are disposed on the first substrate, and fill in the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills in the gaps between the conductive pillars. A bonding method of the package structure is also provided.
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