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公开(公告)号：US20200013744A1
公开(公告)日：2020-01-09
申请号：US16181374
申请日：2018-11-06
发明人： Yu-Chung Hsieh , Chun-Hsien Chien , Yu-Hua Chen
IPC分类号： H01L23/00 , H01L21/027 , H01L21/768
摘要： A circuit board element including an insulating layer, a circuit layer, a protective layer, a plurality of solder balls, and a dielectric layer is provided. The circuit layer is disposed on the insulating layer. The protective layer is disposed on the circuit layer and has a plurality of openings exposing the circuit layer. The plurality of solder balls are disposed on the protective layer and embedded in the corresponding openings. The dielectric layer is disposed between the solder balls and the protective layer. A manufacturing method of a circuit board element is also provided.
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公开(公告)号：US09860980B1
公开(公告)日：2018-01-02
申请号：US15273672
申请日：2016-09-22
发明人： Yu-Chung Hsieh , Chun-Hsien Chien , Wei-Ti Lin , Yu-Hua Chen
CPC分类号： H05K1/0306 , H05K1/0271 , H05K3/0052 , H05K3/4605 , H05K3/4688 , H05K2201/0154 , H05K2201/0175 , H05K2201/068 , H05K2201/09845
摘要： A circuit board element includes a glass substrate, a first dielectric layer, and a first patterned metal layer. The glass substrate has an edge. The first dielectric layer is disposed on the glass substrate and has a central region and an edge region. The edge region is in contact with the edge of the glass substrate, and the thickness of the central region is greater than the thickness of the edge region. The first patterned metal layer is disposed on the glass substrate and in the central region of the first dielectric layer.
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公开(公告)号：US20210193608A1
公开(公告)日：2021-06-24
申请号：US17195649
申请日：2021-03-09
发明人： Yu-Chung Hsieh , Chun-Hsien Chien , Yu-Hua Chen
IPC分类号： H01L23/00 , H01L21/768 , H01L21/027 , H05K3/00
摘要： A manufacturing method of a circuit board element including the following steps is provided: placing a circuit substrate on a carrier, wherein the circuit substrate includes an insulating layer and a circuit layer disposed thereon, a protective layer disposed on the circuit layer and having a plurality of openings exposing thereof, and a plurality of solder balls disposed on the protective layer and embedded in the openings; forming a trench penetrating the circuit substrate to expose the carrier; forming a photoresist material layer to cover the circuit substrate and filling the spaces between each of the solder balls and the protective layer and is filling in the trench to cover the carrier; curing a portion of the photoresist material layer filled in the spaces to form a dielectric layer; removing a portion of the photoresist material layer filled in the trench to expose the carrier; and removing the carrier.
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4.发明授权公开(公告)号：US10937723B2
公开(公告)日：2021-03-02
申请号：US16028440
申请日：2018-07-06
发明人： Yu-Chung Hsieh , Chun-Hsien Chien , Yu-Hua Chen
IPC分类号： H01L23/498 , H01L49/02 , H01L21/683 , H01L21/48 , H01L23/00 , H01F27/28 , H01F27/40 , H01L25/16
摘要： A package carrier structure includes an insulating substrate, a first wiring layer, a second wiring layer, at least one conductive via, a plurality of first and second conductive pads, a first insulating layer, a plurality of first and second conductive structures, and an encapsulated layer. The first and second wiring layers are disposed on the upper and lower surfaces of the insulating substrate respectively. The conductive via penetrates through the insulating substrate and electrically connected to the first and second wiring layers. The first and second conductive pads are disposed on the upper surface and electrically connected to the first wiring layer. The first insulating layer is disposed on the upper surface and exposing the first and second conductive pads. The first and second conductive structures are disposed on the first and second conductive pads respectively. The lower surface of the insulating substrate is covered by the encapsulation layer.
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公开(公告)号：US09854671B1
公开(公告)日：2017-12-26
申请号：US15410745
申请日：2017-01-19
发明人： Wei-Ti Lin , Chun-Hsien Chien , Yu-Chung Hsieh , Yu-Hua Chen
CPC分类号： H05K1/115 , H01F17/0013 , H01F17/0033 , H01F27/24 , H01F27/2804 , H01F2017/002 , H01F2027/2809 , H05K1/036 , H05K1/0366 , H05K1/165 , H05K3/4076 , H05K3/42 , H05K3/423 , H05K3/426 , H05K3/4644 , H05K2201/0187 , H05K2201/0195 , H05K2201/086 , H05K2201/0959
摘要： A circuit board includes a substrate, a first magnetic structure, a first dielectric layer and an inductive coil. The substrate has a top surface and a bottom surface. The first magnetic structure is disposed on the top surface of the substrate. The first dielectric layer covers the substrate and the first magnetic structure. The inductive coil includes a first interconnect, a second interconnect and a plurality of conductive pillars. The first interconnect is disposed on the first dielectric layer. The second interconnect is disposed on the bottom surface of the substrate. The conductive pillars connect the first interconnect and the second interconnect. The first interconnect, the second interconnect and the conductive pillars form a helical structure surrounding the first magnetic structure.
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公开(公告)号：US11579178B1
公开(公告)日：2023-02-14
申请号：US17647012
申请日：2022-01-04
IPC分类号： G01R29/08
摘要： An inspection apparatus used for inspecting a bare circuit board is provided, where the bare circuit board includes an antenna. The inspection apparatus includes a holding stage, a probing device, and a measurement device. The holding stage can hold the bare circuit board. The measurement device is electrically connected to the probing device and electrically connected to the antenna via the probing device. The measurement device can input a first testing signal to the antenna. The antenna can input a second testing signal to the measurement device after receiving the first testing signal. The measurement device can measure the antenna according to the second testing signal, where the first testing signal and the second testing signal both pass through no active component.
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