公开(公告)号：US20180033891A1

公开(公告)日：2018-02-01

申请号：US15253908

申请日：2016-09-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： XIAODONG PU ,  Shao-Hui Wu ,  HAI BIAO YAO ,  Qinggang Xing ,  Chien-Ming Lai ,  Jun Zhu ,  Yu-Cheng Tung ,  ZHIBIAO ZHOU

IPC: H01L29/786 ,  H01L29/417

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/41725 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78648

Abstract: An oxide semiconductor device includes an oxide semiconductor transistor and a protection wall. The protection wall extends in a vertical direction and surrounds the oxide semiconductor transistor. The oxide semiconductor transistor includes a first oxide semiconductor layer, and a bottom surface of the protection wall is lower than the first oxide semiconductor layer in the vertical direction. In the oxide semiconductor device of the present invention, the protection wall is used to surround the oxide semiconductor transistor for improving the ability of blocking environment substances from entering the oxide semiconductor transistor. The electrical stability and product reliability of the oxide semiconductor device are enhanced accordingly.

公开(公告)号：US20170358491A1

公开(公告)日：2017-12-14

申请号：US15655920

申请日：2017-07-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： ZHIBIAO ZHOU ,  Ding-Lung Chen ,  Xing Hua Zhang

IPC: H01L21/768 ,  H01L21/02 ,  H01L29/423 ,  H01L29/45 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L29/40

CPC classification number: H01L21/76895 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L23/485 ,  H01L29/0649 ,  H01L29/401 ,  H01L29/41725 ,  H01L29/42356 ,  H01L29/456 ,  H01L29/66568 ,  H01L29/66659 ,  H01L29/7831

Abstract: A semiconductor transistor device includes a substrate having an active area and a trench isolation region surrounding the active area, a gate oxide layer, a gate, a spacer on a sidewall of the gate, a doping region on one side of the gate, an insulating cap layer covering the gate, the spacer and the doping region, and a redistributed contact layer (RCL) on the insulating cap layer. The RCL extends from the active area to the trench isolation region. A contact plug is disposed above the trench isolation region and is electrically connected to the gate or the doping region through the RCL.

公开(公告)号：US20170170257A1

公开(公告)日：2017-06-15

申请号：US15352551

申请日：2016-11-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： ZHIBIAO ZHOU ,  Shao-Hui Wu ,  Chi-Fa Ku ,  Chen-Bin Lin

IPC: H01L49/02

CPC classification number: H01L28/91 ,  H01L28/92

Abstract: A capacitor includes: a bottom electrode; a middle electrode on the bottom electrode; a top electrode on the middle electrode; a first dielectric layer between the bottom electrode and the middle electrode; and a second dielectric layer between the middle electrode and the top electrode. Preferably, the second dielectric layer is disposed on at least a sidewall of the middle electrode to physically contact the first dielectrically, and the middle electrode includes a H-shape.

公开(公告)号：US20170092771A1

公开(公告)日：2017-03-30

申请号：US14953036

申请日：2015-11-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Fu Hsu ,  Chun-Yuan Wu ,  Xu Yang Shen ,  ZHIBIAO ZHOU ,  Qinggang Xing

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78696

Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a substrate, an interconnect structure, and an oxide semiconductor structure. The substrate has a first region and a second region. The interconnect structure is disposed on the substrate, in the first region. The oxide semiconductor structure is disposed over a hydrogen blocking layer, in the second region of the substrate.

公开(公告)号：US20170017416A1

公开(公告)日：2017-01-19

申请号：US14829644

申请日：2015-08-19

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： ZHIBIAO ZHOU ,  Shao-Hui Wu ,  Chi-Fa Ku ,  Chen-Bin Lin

IPC: G06F3/06 ,  G11C11/4076

CPC classification number: G06F1/3293 ,  G06F1/324 ,  G06F1/3275 ,  G06F1/3287 ,  G11C5/141 ,  G11C7/1006 ,  G11C16/00 ,  G11C2211/4016 ,  H01L27/06 ,  H01L27/07 ,  H01L27/108

Abstract: A semiconductor device includes a main processor, a normally-off processor, and at least one oxide semiconductor random access memory (RAM). The normally-off processor includes at least one oxide semiconductor transistor. The main processor is connected to the normally-off processor, and a clock rate of the main processor is higher than a clock rate of the normally-off processor. The oxide semiconductor RAM is connected to the normally-off processor. An operating method of the semiconductor includes backing up data from the main processor to the normally-off process and/or the oxide semiconductor RAM.

Abstract translation: 半导体器件包括主处理器，常关处理器和至少一个氧化物半导体随机存取存储器（RAM）。 常关处理器包括至少一个氧化物半导体晶体管。 主处理器连接到常关处理器，并且主处理器的时钟速率高于常关处理器的时钟速率。 氧化物半导体RAM连接到常关处理器。 半导体的操作方法包括将数据从主处理器备份到常关处理和/或氧化物半导体RAM。