Method for fabricating a semiconductor component based on GaN
    31.
    发明授权
    Method for fabricating a semiconductor component based on GaN 有权
    用于制造基于GaN的半导体元件的方法

    公开(公告)号:US07691656B2

    公开(公告)日:2010-04-06

    申请号:US10417611

    申请日:2003-04-17

    IPC分类号: H01L21/20

    摘要: A semiconductor component has a plurality of GaN-based layers, which are preferably used to generate radiation, produced in a fabrication process. In the process, the plurality of GaN-based layers are applied to a composite substrate that includes a substrate body and an interlayer. A coefficient of thermal expansion of the substrate body is similar to or preferably greater than the coefficient of thermal expansion of the GaN-based layers, and the GaN-based layers are deposited on the interlayer. The interlayer and the substrate body are preferably joined by a wafer bonding process.

    摘要翻译: 半导体部件具有多个GaN基层,其优选用于在制造工艺中产生的辐射。 在该过程中,将多个GaN基层施加到包括基板主体和中间层的复合基板上。 衬底主体的热膨胀系数与GaN基层的热膨胀系数相似或优选地大于GaN层,GaN基层沉积在中间层上。 中间层和基板主体优选通过晶片接合工艺接合。

    Method for fabricating a semiconductor component based on GaN
    32.
    发明授权
    Method for fabricating a semiconductor component based on GaN 有权
    用于制造基于GaN的半导体元件的方法

    公开(公告)号:US08809086B2

    公开(公告)日:2014-08-19

    申请号:US13398425

    申请日:2012-02-16

    IPC分类号: H01L21/20

    摘要: A semiconductor component has a plurality of GaN-based layers, which are preferably used to generate radiation, produced in a fabrication process. In the process, the plurality of GaN-based layers are applied to a composite substrate that includes a substrate body and an interlayer. A coefficient of thermal expansion of the substrate body is similar to or preferably greater than the coefficient of thermal expansion of the GaN-based layers, and the GaN-based layers are deposited on the interlayer. The interlayer and the substrate body are preferably joined by a wafer bonding process.

    摘要翻译: 半导体部件具有多个GaN基层,其优选用于在制造工艺中产生的辐射。 在该过程中,将多个GaN基层施加到包括基板主体和中间层的复合基板上。 衬底体的热膨胀系数与GaN基层的热膨胀系数相似或优选地大于GaN基层,并且GaN基层沉积在中间层上。 中间层和基板主体优选通过晶片接合工艺接合。

    Method for Fabricating a Semiconductor Component Based on GaN
    33.
    发明申请
    Method for Fabricating a Semiconductor Component Based on GaN 有权
    基于GaN制造半导体元件的方法

    公开(公告)号:US20100200864A1

    公开(公告)日:2010-08-12

    申请号:US12648566

    申请日:2009-12-29

    IPC分类号: H01L33/32

    摘要: A semiconductor component has a plurality of GaN-based layers, which are preferably used to generate radiation, produced in a fabrication process. In the process, the plurality of GaN-based layers are applied to a composite substrate that includes a substrate body and an interlayer. A coefficient of thermal expansion of the substrate body is similar to or preferably greater than the coefficient of thermal expansion of the GaN-based layers, and the GaN-based layers are deposited on the interlayer. The interlayer and the substrate body are preferably joined by a wafer bonding process.

    摘要翻译: 半导体部件具有多个GaN基层,其优选用于在制造工艺中产生的辐射。 在该过程中,将多个GaN基层施加到包括基板主体和中间层的复合基板上。 衬底体的热膨胀系数与GaN基层的热膨胀系数相似或优选地大于GaN基层,并且GaN基层沉积在中间层上。 中间层和基板主体优选通过晶片接合工艺接合。

    Method for fabricating a plurality of electromagnetic radiation emitting semiconductor chips
    34.
    发明申请
    Method for fabricating a plurality of electromagnetic radiation emitting semiconductor chips 有权
    制造多个电磁辐射半导体芯片的方法

    公开(公告)号:US20090130787A1

    公开(公告)日:2009-05-21

    申请号:US12290097

    申请日:2008-10-27

    IPC分类号: H01L21/20

    CPC分类号: H01L33/20 H01L33/46

    摘要: Method for fabricating a semiconductor chip which emits electromagnetic radiation, wherein to improve the light yield of semiconductor chips which emit electromagnetic radiation, a textured reflection surface is integrated on the p-side of a semiconductor chip. The semiconductor chip has an epitaxially produced semiconductor layer stack based on GaN, which comprises an n-conducting semiconductor layer, a p-conducting semiconductor layer and an electromagnetic radiation generating region which is arranged between these two semiconductor layers. The surface of the p-conducting semiconductor layer which faces away from the radiation-generating region is provided with three-dimensional pyramid-like structures. A mirror layer is arranged over the whole of this textured surface. A textured reflection surface is formed between the mirror layer and the p-conducting semiconductor layer.

    摘要翻译: 用于制造发射电磁辐射的半导体芯片的方法,其中为了提高发射电磁辐射的半导体芯片的光输出,纹理反射表面被集成在半导体芯片的p侧上。 半导体芯片具有基于GaN的外延生产的半导体层堆叠,其包括n导电半导体层,p导电半导体层和布置在这两个半导体层之间的电磁辐射产生区域。 面向辐射产生区域的p导电半导体层的表面设置有三维金字塔状结构。 镜面层布置在整个这个有纹理的表面上。 在镜面层和导电性半导体层之间形成纹理反射面。

    Electromagnetic radiation emitting semiconductor chip and procedure for its production
    35.
    发明授权
    Electromagnetic radiation emitting semiconductor chip and procedure for its production 有权
    电磁辐射发射半导体芯片及其生产程序

    公开(公告)号:US07442966B2

    公开(公告)日:2008-10-28

    申请号:US11585632

    申请日:2006-10-24

    IPC分类号: H01L33/00

    CPC分类号: H01L33/20 H01L33/46

    摘要: A semiconductor chip which emits electromagnetic radiation is presented. The chip includes an epitaxially produced semiconductor layer stack based on nitride semiconductor material, which includes an n-conducting semiconductor layer, a p-conducting semiconductor layer, and an electromagnetic radiation generating region, which is arranged between these two semiconductor layers. The chip further includes a base on which the semiconductor layer stack is arranged, and a mirror layer, which is arranged between the semiconductor layer stack and the base. The n-conducting semiconductor layer faces away from the base, and the n-conducting semiconductor layer or an outcoupling layer located on the n-conducting semiconductor layer has a radiation-outcoupling surface which, in turn, includes planar outcoupling sub-surfaces, which are positioned obliquely with respect to a main plane of the radiation-generating region and each form an angle of between 15° and 70° with this plane.

    摘要翻译: 提出了发射电磁辐射的半导体芯片。 芯片包括基于氮化物半导体材料的外延生产的半导体层堆叠,其包括n导电半导体层,p导电半导体层和电磁辐射产生区域,其布置在这两个半导体层之间。 芯片还包括布置有半导体层堆叠的基底和布置在半导体层堆叠和基底之间的镜面层。 n导电半导体层背离基底,并且位于n导电半导体层上的n导电半导体层或输出耦合层具有辐射耦合表面,辐射输出耦合表面又包括平面输出耦合子表面,其中 相对于辐射产生区域的主平面倾斜地定位,并且每个与该平面形成15°至70°的角度。

    Electromagnetic radiation emitting semiconductor chip and procedure for its production
    36.
    发明授权
    Electromagnetic radiation emitting semiconductor chip and procedure for its production 有权
    电磁辐射发射半导体芯片及其生产程序

    公开(公告)号:US07129528B2

    公开(公告)日:2006-10-31

    申请号:US10671854

    申请日:2003-09-25

    IPC分类号: H01L33/00

    CPC分类号: H01L33/20 H01L33/46

    摘要: Semiconductor chip which emits electromagnetic radiation, and method for fabricating it. To improve the light yield of semiconductor chips which emit electromagnetic radiation, a textured reflection surface (131) is integrated on the p-side of a semiconductor chip. The semiconductor chip has an epitaxially produced semiconductor layer stack (1) based on GaN, which comprises an n-conducting semiconductor layer (11), a p-conducting semiconductor layer (13) and an electromagnetic radiation generating region (12) which is arranged between these two semiconductor layers (11, 13). The surface of the p-conducting semiconductor layer (13) which faces away from the radiation-generating region (12) is provided with three-dimensional pyramid-like structures (15). A mirror layer (40) is arranged over the whole of this textured surface. A textured reflection surface (131) is formed between the mirror layer (40) and the p-conducting semiconductor layer (13). The textured reflection surface (131) can increase the amount of light which is decoupled at the radiation-outcoupling surface (111) by virtue of the fact that a beam (3), after double reflection on the reflection surface (131), is more likely not to be totally reflected.

    摘要翻译: 发射电磁辐射的半导体芯片及其制造方法。 为了提高发射电磁辐射的半导体芯片的光输出,在半导体芯片的p侧上集成纹理化反射面(131)。 半导体芯片具有基于GaN的外延生产的半导体层堆叠(1),其包括n导电半导体层(11),p导电半导体层(13)和电磁辐射产生区域(12),其布置 在这两个半导体层(11,13)之间。 背离辐射产生区域(12)的p导电半导体层(13)的表面设置有三维金字塔状结构(15)。 镜面层(40)布置在整个这个纹理表面上。 在镜面层(40)和导电性半导体层(13)之间形成纹理反射面(131)。 纹理反射表面(131)可以通过在反射表面(131)上双重反射之后的光束(3)更多地增加在辐射输出耦合表面(111)处解耦的光量 可能不会被完全反映。

    Radiation-emitting chip and radiation-emitting component
    39.
    发明授权
    Radiation-emitting chip and radiation-emitting component 有权
    辐射发射芯片和辐射发射元件

    公开(公告)号:US07196359B2

    公开(公告)日:2007-03-27

    申请号:US10486953

    申请日:2002-06-05

    IPC分类号: H01L33/00

    摘要: A radiation-emitting chip (2) with a radiation-transmissive window (5), which has a refractive index nF and has a main area (19), with a multilayer structure (9), which contains a radiation-active layer (10) and adjoins the main area (19) of the window (5), and with a radiation-transmissive medium surrounding the window (5) and having the refractive index n0, the window (5) having at least two boundary areas (6, 7), which form an angle β, for which the relationship 90°−αt

    摘要翻译: 一种具有辐射透射窗(5)的辐射发射芯片(2),其具有折射率nλF且具有主区域(19),具有多层结构(9),其中 包含辐射有源层(10)并且邻接窗口(5)的主区域(19),并且围绕窗口(5)并且具有折射率n <0/0的辐射透射介质 >,窗口(5)具有形成角度β的至少两个边界区域(6,7)

    Luminescent diode chip that is flip-chip mounted on a carrier, and method for production thereof
    40.
    发明授权
    Luminescent diode chip that is flip-chip mounted on a carrier, and method for production thereof 有权
    背面安装在载体上的发光二极管芯片及其制造方法

    公开(公告)号:US07663155B2

    公开(公告)日:2010-02-16

    申请号:US11184239

    申请日:2005-07-18

    IPC分类号: H01L33/00

    摘要: A luminescent diode chip for flip-chip mounting on a carrier, having a conductive substrate (12), a semiconductor body (14) that contains a photon-emitting active zone and that is joined by an underside to the substrate (12), and a contact (18), disposed on a top side of the semiconductor body (14), for making an electrically conductive connection with the carrier (30) upon the flip-chip mounting of the chip, whereby either the carrier is solder covered or a layer of solder is applied to the contact. An insulating means (40, 42, 44, 46, 48) is provided on the chip, for electrically insulating free faces of the semiconductor body (14) and free surfaces of the substrate (12) from the solder.

    摘要翻译: 一种用于倒装芯片安装在载体上的发光二极管芯片,具有导电基板(12),包含光子发射活性区并通过下侧连接到基板(12)的半导体本体(14),以及 设置在所述半导体本体(14)的顶侧上的用于在所述芯片的倒装芯片安装时与所述载体(30)进行导电连接的触点(18),由此所述载体被焊接覆盖或 将焊料层施加到触点。 绝缘装置(40,42,44,46,48)设置在芯片上,用于使半导体本体(14)的自由面和衬底(12)与焊料的自由表面电绝缘。