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55 条记录 (耗时 0.047 秒)

    Printed non-volatile memory
    31.
    发明授权
    Printed non-volatile memory 有权
    打印的非易失性存储器

    公开(公告)号：US07709307B2

    公开(公告)日：2010-05-04

    申请号：US11842884

    申请日：2007-08-21

    申请人： Arvind Kamath ,  Patrick Smith ,  James Montague Cleeves

    发明人： Arvind Kamath ,  Patrick Smith ,  James Montague Cleeves

    IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L21/336

    CPC分类号： H01L21/28518 ,  H01L21/288 ,  H01L21/76801 ,  H01L21/76895 ,  H01L27/115 ,  H01L27/11558 ,  H01L27/1292 ,  H01L29/66757 ,  H01L29/66825 ,  H01L29/7881

    摘要： A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.

    摘要翻译： 公开了一种非易失性存储单元，其具有位于相同水平位置并且间隔开预定距离的第一和第二半岛，所述第一半岛具有提供控制栅极和所述第二半岛岛提供源极和漏极端子; 在所述第一半导体岛的至少一部分上的栅介质层; 在所述第二半导体岛的至少一部分上的隧道介电层; 至少部分栅极电介质层和隧道电介质层上的浮栅; 以及与控制栅极以及源极和漏极端子电接触的金属层。 在一个有利的实施例中，可以使用“全印刷”工艺技术来制造非易失性存储单元。

    Multi-Mode Tags and Methods of Making and Using the Same
    32.
    发明申请
    Multi-Mode Tags and Methods of Making and Using the Same 失效
    多模式标签及其使用方法

    公开(公告)号：US20080088417A1

    公开(公告)日：2008-04-17

    申请号：US11870775

    申请日：2007-10-11

    申请人： Patrick SMITH ,  James Montague Cleeves ,  Vikram Pavate ,  Vivek Subramanian

    发明人： Patrick SMITH ,  James Montague Cleeves ,  Vikram Pavate ,  Vivek Subramanian

    IPC分类号： H04B7/00 ,  G08B13/14

    CPC分类号： G06K19/0707 ,  G06K19/0712 ,  G06K19/0723 ,  G08B13/2448 ,  H04W88/06 ,  Y02D70/166

    摘要： Multi-mode (e.g., EAS and RFID) tags and methods for making and using the same are disclosed. The tag generally includes an antenna, an electronic article surveillance (EAS) function block coupled to the antenna, and one or more identification function blocks coupled to the antenna in parallel with the EAS function block. The method of reading the tag generally includes the steps of applying an electric field to the tag, detecting the tag when the electric field has a relatively low power, and detecting an identification signal from the tag when the electric field has a relatively high power. The present invention advantageously enables a single tag to be used for both inventory and anti-theft purposes, thereby improving inventory management and control at reduced system and/or “per-article” costs.

    摘要翻译： 公开了多模式（例如，EAS和RFID）标签及其制造和使用方法。 标签通常包括耦合到天线的天线，电子物品监视（EAS）功能块以及与EAS功能块并行耦合到天线的一个或多个识别功能块。 读取标签的方法通常包括对标签施加电场的步骤，当电场具有相对低的功率时检测标签，以及当电场具有相对高的功率时，从标签中检测识别信号。 本发明有利地使单个标签用于库存和防盗目的，从而改进库存管理和减少系统和/或“每件物品”成本的控制。

    Wireless devices including printed integrated circuitry and methods for manufacturing and using the same
    33.
    发明授权
    Wireless devices including printed integrated circuitry and methods for manufacturing and using the same 有权
    无线设备，包括印刷集成电路及其制造和使用方法

    公开(公告)号：US09004366B2

    公开(公告)日：2015-04-14

    申请号：US12249707

    申请日：2008-10-10

    申请人： Patrick Smith ,  Criswell Choi ,  Vikram Pavate ,  James Montague Cleeves ,  Vivek Subramanian ,  Richard Young ,  Vince Biviano

    发明人： Patrick Smith ,  Criswell Choi ,  Vikram Pavate ,  James Montague Cleeves ,  Vivek Subramanian ,  Richard Young ,  Vince Biviano

    IPC分类号： G06K19/06 ,  G08B13/14 ,  H01L21/30 ,  H01L23/02 ,  G06K19/077

    CPC分类号： G06K19/07749 ,  G06K19/0775 ,  G06K19/07752 ,  Y10T29/49124

    摘要： Printed integrated circuitry and attached antenna and/or inductor for sensors, electronic article surveillance (EAS), radio frequency (RF) and/or RF identification (RFID) tags and devices, and methods for its manufacture. The tag generally includes printed integrated circuitry on one carrier and an antenna and/or inductor on another carrier, the integrated circuitry being electrically coupled to the antenna and/or inductor. The method of manufacture generally includes of printing an integrated circuit having a plurality of first pads on a carrier, forming an antenna and/or inductor having a plurality of second pads on a substrate, and attaching at least two of the first pads of the printed integrated circuit to corresponding second pads of the antenna and/or inductor. The present invention advantageously provides a low cost RFID tag capable of operating at MHz frequencies that can be manufactured in a shorter time period than conventional RFID tags that manufacture all active electrical devices on a conventional wafer.

    摘要翻译： 用于传感器，电子物品监视（EAS），射频（RF）和/或RF识别（RFID）标签和设备的印刷集成电路和连接的天线和/或电感器及其制造方法。 标签通常包括在一个载体上的印刷集成电路和另一个载体上的天线和/或电感器，该集成电路电耦合到天线和/或电感器。 制造方法通常包括印刷在载体上具有多个第一焊盘的集成电路，形成在衬底上具有多个第二焊盘的天线和/或电感器，以及附接印刷的至少两个第一焊盘 集成电路到天线和/或电感器的对应的第二焊盘。 本发明有利地提供了一种低成本的RFID标签，能够以比在传统晶片上制造所有有源电气设备的常规RFID标签更短的时间周期内以MHz频率工作。

    Printed non-volatile memory
    34.
    发明授权
    Printed non-volatile memory 有权
    打印的非易失性存储器

    公开(公告)号：US08796774B2

    公开(公告)日：2014-08-05

    申请号：US13585673

    申请日：2012-08-14

    申请人： Arvind Kamath ,  Patrick Smith ,  James Montague Cleeves

    发明人： Arvind Kamath ,  Patrick Smith ,  James Montague Cleeves

    IPC分类号： H01L29/66 ,  H01L29/788

    CPC分类号： H01L21/28518 ,  H01L21/288 ,  H01L21/76801 ,  H01L21/76895 ,  H01L27/115 ,  H01L27/11558 ,  H01L27/1292 ,  H01L29/66757 ,  H01L29/66825 ,  H01L29/7881

    摘要： A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.

    摘要翻译： 公开了一种非易失性存储单元，其具有位于相同水平位置并且间隔开预定距离的第一和第二半岛，所述第一半岛具有提供控制栅极和所述第二半岛岛提供源极和漏极端子; 在所述第一半导体岛的至少一部分上的栅介质层; 在所述第二半导体岛的至少一部分上的隧道介电层; 至少部分栅极电介质层和隧道电介质层上的浮栅; 以及与控制栅极以及源极和漏极端子电接触的金属层。 在一个有利的实施例中，可以使用“全印刷”工艺技术来制造非易失性存储单元。

    Multi-mode tags and methods of making and using the same
    36.
    发明授权
    Multi-mode tags and methods of making and using the same 失效
    多模式标签及其制作和使用方法

    公开(公告)号：US07750792B2

    公开(公告)日：2010-07-06

    申请号：US11870775

    申请日：2007-10-11

    申请人： Patrick Smith ,  James Montague Cleeves ,  Vikram Pavate ,  Vivek Subramanian

    发明人： Patrick Smith ,  James Montague Cleeves ,  Vikram Pavate ,  Vivek Subramanian

    IPC分类号： H04Q5/22

    CPC分类号： G06K19/0707 ,  G06K19/0712 ,  G06K19/0723 ,  G08B13/2448 ,  H04W88/06 ,  Y02D70/166

    摘要： Multi-mode (e.g., EAS and RFID) tags and methods for making and using the same are disclosed. The tag generally includes an antenna, an electronic article surveillance (EAS) function block coupled to the antenna, and one or more identification function blocks coupled to the antenna in parallel with the EAS function block. The method of reading the tag generally includes the steps of applying an electric field to the tag, detecting the tag when the electric field has a relatively low power, and detecting an identification signal from the tag when the electric field has a relatively high power. The present invention advantageously enables a single tag to be used for both inventory and anti-theft purposes, thereby improving inventory management and control at reduced system and/or “per-article” costs.

    摘要翻译： 公开了多模式（例如，EAS和RFID）标签及其制造和使用方法。 标签通常包括耦合到天线的天线，电子物品监视（EAS）功能块以及与EAS功能块并行耦合到天线的一个或多个识别功能块。 读取标签的方法通常包括对标签施加电场的步骤，当电场具有相对低的功率时检测标签，以及当电场具有相对高的功率时，从标签中检测识别信号。 本发明有利地使单个标签用于库存和防盗目的，从而改进库存管理和减少系统和/或“每件物品”成本的控制。

    Semiconductor device and methods for making the same
    38.
    发明授权
    Semiconductor device and methods for making the same 有权
    半导体器件及其制造方法

    公开(公告)号：US07691691B1

    公开(公告)日：2010-04-06

    申请号：US11805620

    申请日：2007-05-23

    申请人： James Montague Cleeves

    发明人： James Montague Cleeves

    IPC分类号： H01L21/00

    CPC分类号： H01L29/78621 ,  H01L29/66757

    摘要： Thin film transistors (TFT) and methods for making same. The TFTs generally comprise: (a) a semiconductor layer comprising source and drain terminals and a channel region therebetween; (b) a gate electrode comprising a gate and a gate dielectric layer between the gate and the channel region; (c) a first dielectric layer adjacent to the gate electrode and in contact with the source and drain terminals, the first dielectric layer comprising a material which comprises a dopant therein; and (d) an electrically functional source/drain extensions in the channel region, adjacent to the source and drain terminals, comprising a material which comprises the same dopant as the first dielectric layer.

    摘要翻译： 薄膜晶体管（TFT）及其制造方法。 TFT通常包括：（a）包括源极和漏极端子以及它们之间的沟道区域的半导体层; （b）栅电极，在栅极和沟道区之间包括栅极和栅介质层; （c）与栅电极相邻并与源极和漏极端子接触的第一电介质层，第一介电层包括在其中包含掺杂剂的材料; 和（d）沟道区域中的与源极和漏极端子相邻的电功率源极/漏极延伸部分，包括与第一介电层相同的掺杂剂的材料。

    MOS transistor with self-aligned source and drain, and method for making the same
    39.
    发明授权
    MOS transistor with self-aligned source and drain, and method for making the same 失效
    具有自对准源极和漏极的MOS晶体管及其制造方法

    公开(公告)号：US07619248B1

    公开(公告)日：2009-11-17

    申请号：US11084448

    申请日：2005-03-18

    申请人： James Montague Cleeves

    发明人： James Montague Cleeves

    IPC分类号： H01L31/00

    CPC分类号： H01L29/78618 ,  H01L29/04 ,  H01L29/66757

    摘要： A MOS transistor with self-aligned source/drain terminals, and methods for its manufacture. The transistor generally includes an electrically functional substrate, a dielectric film on portions of the substrate, a gate on the dielectric film, and polycrystalline source and drain terminals self-aligned with the gate. The method generally includes forming an amorphous semiconductor material on a gate and on exposed portions of an electrically functional substrate, irradiating an upper surface of the amorphous semiconductor material to form self-aligned polycrystalline semiconducting source/drain terminal layers, and (optionally) selectively removing the non-irradiated amorphous semiconductor material portions. The present invention advantageously provides MOS thin film transistors having reliable electrical characteristics quickly, efficiently, and/or at a low cost by eliminating one or more conventional photolithographic steps.

    摘要翻译： 具有自对准源极/漏极端子的MOS晶体管及其制造方法。 晶体管通常包括电功能衬底，在衬底的部分上的电介质膜，电介质膜上的栅极，以及与栅极自对准的多晶源极和漏极端子。 该方法通常包括在栅极上和在电功能基板的暴露部分上形成非晶半导体材料，照射非晶半导体材料的上表面以形成自对准多晶半导体源极/漏极端子层，和（可选地）选择性地去除 未照射的非晶半导体材料部分。 本发明有利地通过消除一个或多个常规光刻步骤来快速，有效地和/或以低成本提供具有可靠电特性的MOS薄膜晶体管。