公开(公告)号：US07561455B2

公开(公告)日：2009-07-14

申请号：US11498175

申请日：2006-08-03

申请人： Toshio Ogawa ,  Yoshihiro Takemae ,  Yoshinori Okajima ,  Tetsuhiko Endo ,  Yasuro Matsuzaki

发明人： Toshio Ogawa ,  Yoshihiro Takemae ,  Yoshinori Okajima ,  Tetsuhiko Endo ,  Yasuro Matsuzaki

IPC分类号： G11C13/04

CPC分类号： G06F13/4072

摘要： A controller converts a parallel command signal and address signal, or a parallel write data signal into a first serial signal, and outputs the converted signal as a first optical signal with a single wavelength to a memory device via an optical transmission line. The memory device converts the first optical signal into the original parallel command signal, address signal, and write data signal, and outputs the converted parallel signals to a memory unit. The memory device converts a parallel read data signal from the memory unit into a second serial signal, and outputs the converted signal to the controller via the optical transmission line as a second optical signal with a single wavelength. It is unnecessary to transmit the optical signal using an optical multiplexer, an optical demultiplexer, etc., thereby improving transmission rate of signals transmitted between the controller and the memory device at minimum cost.

摘要翻译： 控制器将并行命令信号和地址信号或并行写入数据信号转换为第一串行信号，并将转换的信号作为具有单一波长的第一光信号通过光传输线输出到存储器件。 存储器件将第一光信号转换为原始并行命令信号，地址信号和写数据信号，并将转换的并行信号输出到存储器单元。 存储器装置将来自存储器单元的并行读取数据信号转换为第二串行信号，并且经由光传输线路将转换的信号作为具有单个波长的第二光信号输出到控制器。 不需要使用光复用器，光解复用器等来发送光信号，从而以最小的成本提高在控制器和存储器件之间传输的信号的传输速率。

公开(公告)号：US07388791B2

公开(公告)日：2008-06-17

申请号：US11583130

申请日：2006-10-19

申请人： Yoshiharu Kato ,  Yoshihiro Takemae ,  Toshio Ogawa ,  Tetsuhiko Endoh ,  Yoshinori Okajima

发明人： Yoshiharu Kato ,  Yoshihiro Takemae ,  Toshio Ogawa ,  Tetsuhiko Endoh ,  Yoshinori Okajima

IPC分类号： G11C7/10

CPC分类号： H04L25/0282 ,  H04L5/04 ,  H04L25/0294

摘要： Plural transmitter units generate plural currents corresponding to plural logical values, respectively, and propagate the currents to a common signal line. The common signal line synthesizes the currents generated by the transmitter units, and propagates them to a receiver unit as a synthetic current. The receiver unit restores the logical values the transmitter units generated, in accordance with the synthetic current. The values of the currents the transmitter units generate in correspondence with the logical values each differ, so that the value of the synthetic current can be changed for every combination of logical values. Accordingly, the receiver unit can restore the logical values outputted from the respective transmitter units, based on the synthetic current. That is, employing the common signal line enables signals transmitted from the transmitter units to be simultaneously received. Consequently, the number of signal lines laid between the transmitter units and the receiver unit is reduced.

摘要翻译： 多个发射机单元分别产生对应于多个逻辑值的多个电流，并将电流传播到公共信号线。 公共信号线合成由发射机单元产生的电流，并将其作为合成电流传播到接收机单元。 接收器单元根据合成电流恢复发射机单元产生的逻辑值。 发射机单元对应​​于逻辑值产生的电流值各自不同，使得可以针对逻辑值的每个组合来改变合成电流的值。 因此，接收机单元可以基于合成电流来恢复从各个发射机单元输出的逻辑值。 也就是说，采用公共信号线使得能够同时接收从发送单元发送的信号。 因此，放置在发射机单元和接收机单元之间的信号线的数量减少。

公开(公告)号：US20070230231A1

公开(公告)日：2007-10-04

申请号：US11498175

申请日：2006-08-03

申请人： Toshio Ogawa ,  Yoshihiro Takemae ,  Yoshinori Okajima ,  Tetsuhiko Endo ,  Yasuro Matsuzaki

发明人： Toshio Ogawa ,  Yoshihiro Takemae ,  Yoshinori Okajima ,  Tetsuhiko Endo ,  Yasuro Matsuzaki

IPC分类号： G11C13/04

CPC分类号： G06F13/4072

摘要： A controller converts a parallel command signal and address signal, or a parallel write data signal into a first serial signal, and outputs the converted signal as a first optical signal with a single wavelength to a memory device via an optical transmission line. The memory device converts the first optical signal into the original parallel command signal, address signal, and write data signal, and outputs the converted parallel signals to a memory unit. The memory device converts a parallel read data signal from the memory unit into a second serial signal, and outputs the converted signal to the controller via the optical transmission line as a second optical signal with a single wavelength. It is unnecessary to transmit the optical signal using an optical multiplexer, an optical demultiplexer, etc., thereby improving transmission rate of signals transmitted between the controller and the memory device at minimum cost.

摘要翻译： 控制器将并行命令信号和地址信号或并行写入数据信号转换为第一串行信号，并将转换的信号作为具有单一波长的第一光信号通过光传输线输出到存储器件。 存储器件将第一光信号转换为原始并行命令信号，地址信号和写数据信号，并将转换的并行信号输出到存储器单元。 存储器装置将来自存储器单元的并行读取数据信号转换为第二串行信号，并且经由光传输线路将转换的信号作为具有单个波长的第二光信号输出到控制器。 不需要使用光复用器，光解复用器等来发送光信号，从而以最小的成本提高在控制器和存储器件之间传输的信号的传输速率。

公开(公告)号：US20070192664A1

公开(公告)日：2007-08-16

申请号：US11443109

申请日：2006-05-31

申请人： Toshio Ogawa ,  Yoshihiro Takemae ,  Yoshinori Okajima ,  Tetsuhiko Endo ,  Yasuro Matsuzaki

发明人： Toshio Ogawa ,  Yoshihiro Takemae ,  Yoshinori Okajima ,  Tetsuhiko Endo ,  Yasuro Matsuzaki

IPC分类号： G11C29/00

CPC分类号： G11C29/42

摘要： A conversion control unit sets a converting function of a write data conversion unit or a read data conversion unit enabled or disabled for each controller. Accordingly, for a controller which needs original external data, the external data can be inputted and outputted, whereas for a controller which needs converted internal data, the internal data can be inputted and outputted. A data converting function of a conventional controller can be realized in a semiconductor memory, which can reduce the load on the controller. As a result, the performance of a system can be improved. A disabled controller which has no access right cannot read correct data (original data before conversion). Hence, the security of data written into the semiconductor memory can be protected.

摘要翻译： 转换控制单元设置对每个控制器启用或禁用的写数据转换单元或读数据转换单元的转换功能。 因此，对于需要原始外部数据的控制器，可以输入和输出外部数据，而对于需要转换的内部数据的控制器，可以输入和输出内部数据。 可以在半导体存储器中实现传统控制器的数据转换功能，这可以减少控制器上的负载。 结果，可以提高系统的性能。 无权访问的无​​效控制器无法读取正确的数据（转换前的原始数据）。 因此，可以保护写入半导体存储器的数据的安全性。

公开(公告)号：US20070189100A1

公开(公告)日：2007-08-16

申请号：US11443028

申请日：2006-05-31

申请人： Toshio Ogawa ,  Yoshihiro Takemae ,  Yoshinori Okajima ,  Tetsuhiko Endo ,  Yasuro Matsuzaki

发明人： Toshio Ogawa ,  Yoshihiro Takemae ,  Yoshinori Okajima ,  Tetsuhiko Endo ,  Yasuro Matsuzaki

IPC分类号： G11C7/10 ,  G11C8/00

CPC分类号： G11C7/1006

摘要： A memory cell array ARY includes a plurality of sub-arrays SARY. A data transfer unit DTU alternately accesses the sub-arrays SARY to transfer data between the sub-arrays SARY. Accordingly, it is possible to transfer data stored in one of the sub-arrays SARY to another sub-array SARY without outputting the data to a bus connected to a semiconductor memory MEM. For example, a microcontroller CNT in a system MSYS can use the bus during the data transfer since the bus is not used for the data transfer. As a result, it is possible to prevent the performance of the system MSYS from being deteriorated due to the data transfer.

摘要翻译： 存储单元阵列ARY包括多个子阵列SARY。 数据传输单元DTU交替地访问子阵列SARY以在子阵列SARY之间传送数据。 因此，可以将存储在一个子阵列SARY中的数据传送到另一个子阵列SARY，而不将数据输出到连接到半导体存储器MEM的总线。 例如，系统MSYS中的微控制器CNT可以在数据传输期间使用总线，因为总线不用于数据传输。 结果，可以防止系统MSYS的性能由于数据传输而恶化。

公开(公告)号：US20070189052A1

公开(公告)日：2007-08-16

申请号：US11443030

申请日：2006-05-31

申请人： Toshio Ogawa ,  Yoshihiro Takemae ,  Yoshinori Okajima ,  Tetsuhiko Endo ,  Yasuro Matsuzaki

发明人： Toshio Ogawa ,  Yoshihiro Takemae ,  Yoshinori Okajima ,  Tetsuhiko Endo ,  Yasuro Matsuzaki

IPC分类号： G11C13/04 ,  G11C7/10 ,  G11C5/06

CPC分类号： G06F13/4243 ,  G11C5/066 ,  G11C7/1006

摘要： A memory controller multiplexes access signals each consisting of a plurality of bits as optical signals and outputs the multiplexed optical signals. At this time, the optical signals whose wavelengths differ depending on memory devices are generated. A memory interface unit demultiplexes the multiplexed optical signals into the original optical signals and converts the demultiplexed optical signals into electrical signals. The memory interface unit determines to which of the memory devices the electrical signals resulting from the conversion should be outputted, according to the wavelengths of the demultiplexed optical signals. This frees the memory controller from a need for transmitting to the memory interface unit a signal for identifying the memory device. The memory interface unit need not include a decoding circuit for identifying the memory device.

摘要翻译： 存储器控制器将每个由多个位组成的访问信号复用为光信号并输出​​复用的光信号。 此时，产生根据存储器件波长不同的光信号。 存储器接口单元将复用的光信号解复用为原始光信号，并将解复用的光信号转换为电信号。 存储器接口单元根据解复用的光信号的波长来确定应该向哪个存储器件输出由转换产生的电信号。 这使得存储器控制器不需要向存储器接口单元发送用于识别存储器件的信号。 存储器接口单元不需要包括用于识别存储器件的解码电路。

公开(公告)号：US06744300B2

公开(公告)日：2004-06-01

申请号：US10277707

申请日：2002-10-23

申请人： Masao Taguchi ,  Satoshi Eto ,  Yoshihiro Takemae ,  Hiroshi Yoshioka ,  Makoto Koga

发明人： Masao Taguchi ,  Satoshi Eto ,  Yoshihiro Takemae ,  Hiroshi Yoshioka ,  Makoto Koga

IPC分类号： H01J1982

CPC分类号： H03K19/018585

摘要： A semiconductor integrated circuit includes a switch unit for controlling the supply of a power source voltage to a signal amplification circuit for receiving an input signal, and a control unit for selectively turning ON and OFF the switch unit in accordance with the amplitude or frequency of the input signal. By the constitution, it is possible to provide an input circuit or an output circuit capable of being applied to an input/output interface adapted for a small amplitude operation.

摘要翻译： 半导体集成电路包括用于控制向接收输入信号的信号放大电路提供电源电压的开关单元，以及用于根据所述开关单元的幅度或频率选择性地接通和断开开关单元的控制单元 输入信号。 通过该结构，可以提供能够应用于适于小振幅操作的输入/输出接口的输入电路或输出电路。

公开(公告)号：US06492846B1

公开(公告)日：2002-12-10

申请号：US09474702

申请日：1999-12-29

申请人： Masao Taguchi ,  Satoshi Eto ,  Yoshihiro Takemae ,  Hiroshi Yoshioka ,  Makoto Koga

发明人： Masao Taguchi ,  Satoshi Eto ,  Yoshihiro Takemae ,  Hiroshi Yoshioka ,  Makoto Koga

IPC分类号： H03K300

CPC分类号： H03K19/018585

摘要： A semiconductor integrated circuit includes a switch unit for controlling the supply of a power source voltage to a signal amplification circuit for receiving an input signal, and a control unit for selectively turning ON and OFF the switch unit in accordance with the amplitude or frequency of the input signal. By this constitution, it is possible to provide an input circuit or an output circuit capable of being applied to an input/output interface adapted for a small amplitude operation.

摘要翻译： 半导体集成电路包括用于控制向接收输入信号的信号放大电路提供电源电压的开关单元，以及用于根据所述开关单元的幅度或频率选择性地接通和断开开关单元的控制单元 输入信号。 通过这种结构，可以提供能够应用于适于小振幅操作的输入/输出接口的输入电路或输出电路。

公开(公告)号：US06737893B2

公开(公告)日：2004-05-18

申请号：US10278076

申请日：2002-10-23

申请人： Masao Taguchi ,  Satoshi Eto ,  Yoshihiro Takemae ,  Hiroshi Yoshioka ,  Makoto Koga

发明人： Masao Taguchi ,  Satoshi Eto ,  Yoshihiro Takemae ,  Hiroshi Yoshioka ,  Makoto Koga

IPC分类号： H03K522

CPC分类号： H03K19/018585

摘要： A semiconductor integrated circuit includes a switch unit for controlling the supply of a power source voltage to a signal amplification circuit for receiving an input signal, and a control unit for selectively turning ON and OFF the switch unit in accordance with the amplitude or frequency of the input signal. By the constitution, it is possible to provide an input circuit or an output circuit capable of being applied to an input/output interface adapted for a small amplitude operation.

公开(公告)号：US6034555A

公开(公告)日：2000-03-07

申请号：US718045

申请日：1996-09-13

申请人： Masao Taguchi ,  Satoshi Eto ,  Yoshihiro Takemae ,  Hiroshi Yoshioka ,  Makoto Koga

发明人： Masao Taguchi ,  Satoshi Eto ,  Yoshihiro Takemae ,  Hiroshi Yoshioka ,  Makoto Koga

IPC分类号： H03K19/0185 ,  H03F3/45

CPC分类号： H03K19/018585

摘要： A semiconductor integrated circuit includes a switch unit for controlling the supply of a power source voltage to a signal amplification circuit for receiving an input signal, and a control unit for selectively turning ON and OFF the switch unit in accordance with the amplitude or frequency of the input signal. By the constitution, it is possible to provide an input circuit or an output circuit capable of being applied to an input/output interface adapted for a small amplitude operation.