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公开(公告)号：US12112704B2
公开(公告)日：2024-10-08
申请号：US18501031
申请日：2023-11-03
Applicant: Samsung Display Co., Ltd.
Inventor： Yeonkyung Kim , Kwihyun Kim , Dongwoo Kim
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/08 , G09G2320/045 , G09G2330/021
Abstract: A pixel circuit is disclosed that includes first through sixth transistors, first and second capacitors, and a light emitting element. A gate electrode of the second transistor receives a first gate signal. A gate electrode of the third transistor receive a second gate signal. Gate electrodes of each of the fourth and fifth transistors receive a third gate signal. A gate electrode of the sixth transistor receives an emission signal. First electrodes of the first transistor and the first capacitor each receive a first power supply voltage. A cathode electrode of the light emitting element receives a second power supply voltage. A first electrode of the fourth transistor receives an initialization voltage.
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公开(公告)号：US12112701B2
公开(公告)日：2024-10-08
申请号：US18321900
申请日：2023-05-23
Applicant: Samsung Display Co., Ltd.
Inventor： Danwon Lim , Hyunjoon Kim , Bon-Yong Koo
IPC: G09G3/3233 , H10K59/131
CPC classification number: G09G3/3233 , H10K59/131 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/08
Abstract: A display device includes a display panel including a first pixel, a second pixel, and a connection line connecting the first pixel and the second pixel. Each of the first pixel and the second pixel includes a light emitting element, a first transistor including a first electrode, a second electrode electrically connected to the light emitting element, and a gate electrode, a second transistor connected between a first driving voltage line and a connection node and including a gate electrode connected to an emission line, a third transistor connected between a second driving voltage line and the connection node and including a gate electrode connected to the emission line, and a capacitor connected between the gate electrode of the first transistor and the connection node. The connection node of the first pixel is electrically connected to the connection node of the second pixel through the connection line.
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公开(公告)号：US12112678B2
公开(公告)日：2024-10-08
申请号：US17822962
申请日：2022-08-29
Applicant: X Display Company Technology Limited
Inventor： Imre Knausz , Ronald S. Cok
IPC: G09G3/20 , G09G3/3233 , G09G3/32 , G09G3/36
CPC classification number: G09G3/2018 , G09G3/3233 , G09G3/32 , G09G3/36 , G09G2310/08 , G09G2330/02
Abstract: A hybrid pulse-width-modulation pixel includes a light controller responsive to a variable power signal specifying different powers and a pixel controller. The pixel controller is operable receive a pixel luminance signal comprising multiple bits specifying a desired light-controller luminance, generate the variable power signal in response to the pixel luminance signal, and drive the light controller to emit light at different luminances in response to the variable power signal for different time periods. The pixel controller is operable to provide the variable power signal at a constant first power for a first time period and provide the variable power signal at a constant second power different from the constant first power for a second time period.
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公开(公告)号：US20240331656A1
公开(公告)日：2024-10-03
申请号：US18609715
申请日：2024-03-19
Applicant: LAPIS Technology Co., Ltd.
Inventor： Kenji Yanagawa
IPC: G09G3/36
CPC classification number: G09G3/3696 , G09G2310/08 , G09G2320/0673 , G09G2330/12
Abstract: A source driver of the disclosure supplies a display device having a plurality of display cells with gradation voltages corresponding to respective luminance levels for the display cells indicated by a video signal. The source driver includes a gamma voltage generating circuit and a gradation voltage determination circuit. The gamma voltage generating circuit includes a resistor voltage dividing circuit with a plurality of output terminals. The plurality of output terminals output respective reference voltages divided according to gamma curve characteristics for generating the gradation voltages. The gradation voltage determination circuit measures an electric potential difference between one pair among the plurality of output terminals and determines whether or not the electric potential difference corresponds to a reference voltage group based on the gamma curve characteristics.
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35.发明公开公开(公告)号：US20240331654A1
公开(公告)日：2024-10-03
申请号：US18236927
申请日：2023-08-22
Applicant: HKC CORPORATION LIMITED
Inventor： YONGJIE JIANG , Haijiang YUAN
IPC: G09G3/36
CPC classification number: G09G3/3688 , G09G2300/0819 , G09G2310/08 , G09G2320/0233
Abstract: A driving circuit of a display panel and a driving method thereof are disclosed. The display panel includes multiple data lines and fan-out traces connected to the multiple fan-out traces in one-to-one correspondence. The driving circuit includes multiple compensation circuits and a signal input unit. Each compensation circuit includes an input terminal and an output terminal. The output terminals of the multiple compensation circuits are respectively connected to the plurality of fan-out traces. At least two gear positions are set in each compensation circuit. When the gear position of the compensation circuit increases, a capacitance value or a resistance value of the compensation circuit gradually decreases. The signal input unit outputs data signals to the input terminals of the multiple compensation circuits. Each compensation circuit selects a gear position depending on a gray scale of a data signal or a scanning time during progressive scanning of the display panel.
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Patent Agency Ranking
公开(公告)号：US20240331641A1
公开(公告)日：2024-10-03
申请号：US18293869
申请日：2022-07-28
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Munehiro KOZUMA , Tatsuya ONUKI , Hidetomo KOBAYASHI
IPC: G09G3/3266 , G06F3/042 , G06V40/13 , G09G3/3233
CPC classification number: G09G3/3266 , G06F3/042 , G06V40/1318 , G09G3/3233 , G09G2300/0426 , G09G2300/0842 , G09G2310/0286 , G09G2310/08 , G09G2330/021 , G09G2354/00 , G09G2360/14
Abstract: To provide a display apparatus with a novel structure. A display portion including a first subpixel, a second subpixel, a first gate line supplied with a first selection signal to scan the first subpixel, and a second gate line supplied with a second selection signal to scan the second subpixel; and a driver control circuit including a gate line driver circuit, a switching portion that allots the first selection signal or the second selection signal output from the gate line driver circuit to the first gate line or the second gate line to be output, and a timing control circuit that controls the switching portion are included. The timing control circuit allows the gate line driver circuit to output the first selection signal of a first frame frequency and the second selection signal having a selection period longer than the first selection signal in a first operation mode, and to output the first selection signal and the second selection signal with a second frame frequency lower than the first frame frequency in a second operation mode.
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公开(公告)号：US20240331638A1
公开(公告)日：2024-10-03
申请号：US18741367
申请日：2024-06-12
Applicant: Xiamen Tianma Display Technology Co., Ltd.
Inventor： Jianfeng XIE
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0819 , G09G2300/0842 , G09G2310/0251 , G09G2310/08 , G09G2320/0233 , G09G2320/0686 , G09G2330/021
Abstract: Provided are a display panel and a display device. The display panel includes at least two display regions and a pixel circuit. The at least two display regions include a first display region and a second display region. The pixel circuit includes at least a first pixel circuit and a second pixel circuit, where the first pixel circuit is disposed in the first display region and the second pixel circuit is disposed in the second display region. The pixel circuit receives a reset signal including a first reset signal and a second reset signal, where when a refresh rate of the first display region is f1, the first pixel circuit receives the first reset signal, and when a refresh rate of the second display region is f2, the second pixel circuit receives the second reset signal.
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公开(公告)号：US20240331631A1
公开(公告)日：2024-10-03
申请号：US18579507
申请日：2022-04-27
Inventor： Rui WANG , Ming HU , Haijun QIU , Juntao CHEN
IPC: G09G3/3233 , H10K59/121 , H10K59/131
CPC classification number: G09G3/3233 , H10K59/1213 , H10K59/1216 , H10K59/1315 , G09G2310/08 , G09G2320/0233
Abstract: The present disclosure provides a display panel and a display device. The display panel includes: a base substrate, a first active layer on a side of the base substrate, and a third conductive layer on a side of the first active layer away from the base substrate. The first active layer includes active portions spaced apart, wherein each active portion includes a sub-active portion and a via-hole connection portion connected to each other, and the sub-active portion is disposed corresponding to a transistor of two or more transistors, and configured to form a channel region of the corresponding transistor. The third conductive layer includes at least one bridge portion, wherein the at least one bridge portion is connected to via-hole connection portions in different active portions through via holes, respectively. A sheet resistance of the third conductive layer is less than a sheet resistance of the via hole connection portion.
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公开(公告)号：US20240331629A1
公开(公告)日：2024-10-03
申请号：US18523765
申请日：2023-11-29
Inventor： Weigao CHENG
IPC: G09G3/3233 , H10K59/131
CPC classification number: G09G3/3233 , H10K59/131 , G09G2300/0426 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/08
Abstract: Disclosed is pixel drive circuit including a light-emitting device electrically connected to a first power supply terminal and a second power supply terminal; a drive transistor having a gate electrically connected to a first node and a source and a drain electrically connected to second and third nodes; a first light-emitting control transistor having a source and a drain electrically connected to the first power supply terminal and the second node, and a gate configured to receive a first light-emitting control signal; and a second light-emitting control transistor having a source and a drain electrically connected to the third node and the light-emitting device, and a gate configured to receive a second light-emitting control signal. The first light-emitting control transistor is configured to transmit a first voltage signal supplied from the first power supply terminal to the second and third nodes at a node setting stage.
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公开(公告)号：US12106704B2
公开(公告)日：2024-10-01
申请号：US18187677
申请日：2023-03-22
Applicant: Innolux Corporation
Inventor： Yu-Hsin Feng , Yu-Tse Lu , Ming-Chi Weng
IPC: G09G3/32 , G09G3/3266 , G09G3/3275
CPC classification number: G09G3/32 , G09G3/3266 , G09G3/3275 , G09G2300/0426 , G09G2310/0221 , G09G2310/08
Abstract: An electronic device is provided. The electronic device includes an integrated driver board and at least one semiconductor unit substrate. The integrated driver board includes a circuit board, a data drive circuit, and a scanning drive circuit. The data drive circuit and the scanning drive circuit are disposed on the circuit board. The at least one semiconductor unit substrate is coupled to the data drive circuit and the scanning drive circuit.
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