公开(公告)号：US10354927B2

公开(公告)日：2019-07-16

申请号：US16027707

申请日：2018-07-05

Applicant: STMicroelectronics, Inc.

Inventor： Nicolas Loubet ,  Pierre Morin ,  Yann Mignot

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/165 ,  H01L21/02 ,  H01L21/762 ,  H01L29/49 ,  H01L29/78 ,  H01L29/06 ,  H01L29/417

Abstract: Integrated circuits are disclosed in which the strain properties of adjacent pFETs and nFETs are independently adjustable. The pFETs include compressive-strained SiGe on a silicon substrate, while the nFETs include tensile-strained silicon on a strain-relaxed SiGe substrate. Adjacent n-type and p-type FinFETs are separated by electrically insulating regions formed by a damascene process. During formation of the insulating regions, the SiGe substrate supporting the n-type devices is permitted to relax elastically, thereby limiting defect formation in the crystal lattice of the SiGe substrate.

公开(公告)号：US10347569B2

公开(公告)日：2019-07-09

申请号：US15801022

申请日：2017-11-01

Applicant: STMicroelectronics, Inc.

Inventor： Jefferson Talledo

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L23/29

Abstract: Embodiments of the present disclosure are directed to leadframes having the cantilevered extension that includes an integral support on the end of the lead nearest the die pad. A support integral to the leadframe allows the support to be built to the proper height to support the cantilevered lead in each package and reduces or eliminates the upward, downward, and side to side deflections caused or allowed by supports built-in to the tooling of the manufacturing equipment. Also, by building the support into the leadframe, the leadframes may be pretaped prior to the die attach and wire bonding steps of the manufacturing process.

公开(公告)号：US20190198454A1

公开(公告)日：2019-06-27

申请号：US16223582

申请日：2018-12-18

Applicant: STMICROELECTRONICS, INC.

Inventor： Jefferson TALLEDO

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/562 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/4842 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49541

Abstract: A leadframe having extensions around an outer edge of a die pad are disclosed. More specifically, leadframes are created with a flange formed at the outer edge of the die pad and extending away from the die pad. The flange is bent, such that it is positioned at an angle with respect to the die pad. Leadframes are also created with anchoring posts formed adjacent the outer edge of the die pad and extending away from the die pad. The anchoring posts have a central thickness that is less than a thickness of first and second portions opposite the central portion. When the leadframe is incorporated into a package, molding compound completely surrounds each flange or anchoring post, which increases the bond strength between the leadframe and the molding compound due to increased contact area. The net result is a reduced possibility of delamination at edges of the die pad.

公开(公告)号：US10319816B2

公开(公告)日：2019-06-11

申请号：US16016021

申请日：2018-06-22

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  STMicroelectronics, Inc.

Inventor： Hong He ,  Nicolas Loubet ,  Junli Wang

IPC: H01L21/02 ,  H01L29/10 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78 ,  H01L21/225 ,  H01L21/311 ,  H01L29/161 ,  H01L29/167

Abstract: A fin field effect transistor includes a Si fin including a central portion between end portions of the fin, and a SiGe channel region disposed on the central portion of the fin. The SiGe channel region includes a facet free SiGe region having Ge atoms diffused into the Si fin and includes a same shape as the Si fin outside the central portion.

公开(公告)号：US20190139875A1

公开(公告)日：2019-05-09

申请号：US15808680

申请日：2017-11-09

Applicant: STMICROELECTRONICS, INC.

Inventor： Rennier Rodriguez ,  Aiza Marie Agudon ,  Maiden Grace Maming

IPC: H01L23/495

Abstract: The present disclosure is directed to a flat no-lead semiconductor package with a surfaced mounted structure. An end portion of the surface mounted structure includes a recessed member so that the surface mounted structure is coupled to leads of the flat no-lead semiconductor package through, among others, the sidewalls of the recessed members.

公开(公告)号：US10284262B1

公开(公告)日：2019-05-07

申请号：US16012514

申请日：2018-06-19

Applicant: STMICROELECTRONICS, INC.

Inventor： Christophe Henri Ricard ,  Mohammad Mazooji

IPC: H04B5/00 ,  H04B5/02 ,  H04L29/08 ,  H04W4/38

Abstract: A method and near field communications (NFC) system for sensing at least one of an environmental condition or a composition of media in a proximity of the NFC system are provided. In the method and system, a first antenna irradiates an electromagnetic field during a sensor mode. A second antenna detects the electromagnetic field and outputs a voltage representative of the detected electromagnetic field. An NFC controller receives a signal representative of the voltage. The NFC controller determines at least one of the environmental condition or the composition of media based on an association stored in memory between the voltage and the at least one of the environmental condition or the composition of media.

公开(公告)号：US10276573B2

公开(公告)日：2019-04-30

申请号：US15168382

申请日：2016-05-31

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc. ,  STMicroelectronics, Inc.

Inventor： Xiuyu Cai ,  Qing Liu ,  Ruilong Xie ,  Chun-chen Yeh

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/16 ,  H01L29/06 ,  H01L21/308 ,  H01L21/033 ,  H01L29/78 ,  H01L29/165 ,  H01L21/84 ,  H01L27/12 ,  H01L29/10

Abstract: A semiconductor substrate includes a bulk substrate layer that extends along a first axis to define a width and a second axis perpendicular to the first axis to define a height. A plurality of hetero semiconductor fins includes an epitaxial material formed on a first region of the bulk substrate layer. A plurality of non-hetero semiconductor fins is formed on a second region of the bulk substrate layer different from the first region. The non-hetero semiconductor fins are integrally formed from the bulk substrate layer such that the material of the non-hetero semiconductor fins is different from the epitaxial material.

公开(公告)号：US10272684B2

公开(公告)日：2019-04-30

申请号：US15253601

申请日：2016-08-31

Applicant: STMICROELECTRONICS, INC. ,  STMICROELECTRONICS INTERNATIONAL N.V. ,  STMICROELECTRONICS S.R.L.

Inventor： Simon Dodd ,  David S. Hunt ,  Joseph Edward Scheffelin ,  Dana Gruenbacher ,  Stefan H. Hollinger ,  Uwe Schober ,  Peter Janouch

IPC: B41J2/14 ,  B41J2/175

Abstract: The present disclosure provides supports for microfluidic die that allow for nozzles of the microfluidic die to be on a different plane or face a different direction from electrical contacts on the same support. This includes a rigid support having electrical contacts on a different side of the rigid support with respect to a direction of ejection of the nozzles, and a semi-flexible support or semi-rigid support that allow the electrical contacts to be moved with respect to a direction of ejection of the nozzles. The semi-flexible and semi-rigid supports allow the die to be up to and beyond a 90 degree angle with respect to a plane of the electrical contacts. The different supports allow for a variety of positions of the microfluidic die with respect to a position of the electrical contacts.

公开(公告)号：US10264667B2

公开(公告)日：2019-04-16

申请号：US14310601

申请日：2014-06-20

Applicant: STMicroelectronics, Inc. ,  STMicroelectronics S.R.L. ,  STMicroelectronics International N.V.

Inventor： Simon Dodd ,  Joe Scheffelin ,  Dave Hunt ,  Steve Bush ,  Faiz Sherman

IPC: H05K1/02 ,  B41J2/175

Abstract: The present disclosure is directed to a system that is configured to eject fluid vertically away from a thermal microfluidic die for use with scented oils or other fluids. The die is coupled to a rigid planar support board that separates the die from a reservoir of the fluid. The support board includes an opening that is lined with an inert liner that protects an interior surface of the support board from the fluid. The support board includes contact to an external power supply and contacts to the die on a first surface. The die is coupled to this first surface such that the second surface remains free of electrical connections.

公开(公告)号：US10260877B2

公开(公告)日：2019-04-16

申请号：US14749118

申请日：2015-06-24

Applicant: STMicroelectronics, Inc.

Inventor： Mahesh Chowdhary ,  Sankalp Dayal

IPC: G01C19/32 ,  G01C19/5776 ,  G01P15/18

Abstract: An electronic device includes a printed circuit board (PCB) having at least one conductive trace thereon. A system on chip (SoC) is mounted on the PCB and electrically coupled to the conductive trace. A sensor chip is mounted on the PCB in a spaced apart relation with the SoC and electrically coupled to the conductive trace such that the sensor chip and SoC are electrically coupled. The sensor chip includes an accelerometer and/or a gyroscope, and a control circuit. The control circuit is configured to receive configuration data as input, acquire data from the accelerometer and/or the gyroscope. The control circuit is also configured to process the data so as to generate a context of the electronic device relative to its surroundings, the processing being performed in using a processing technique operating in accordance with the configuration data, and output the context.