公开(公告)号：US20240114129A1

公开(公告)日：2024-04-04

申请号：US18529380

申请日：2023-12-05

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Chong Soon Lim ,  Han Boon Teo ,  Che Wei Kuo ,  Hai Wei Sun ,  Chu Tong Wang ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/105 ,  H04N19/14 ,  H04N19/159 ,  H04N19/176

CPC classification number: H04N19/105 ,  H04N19/14 ,  H04N19/159 ,  H04N19/176

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation: determines whether a size of a current block, which is a unit for which a vector candidate list including vector candidates is generated, is less than or equal to a threshold; when the size of the current block is less than or equal to the threshold, generates the vector candidate list by registering a history-based motion vector predictor (HMVP) vector candidate in the vector candidate list from an HMVP table without performing a first pruning process; when the size of the current block is greater than the threshold, generates the vector candidate list by performing the first pruning process and registering the HMVP vector candidate in the vector candidate list from the HMVP table; and encodes the current block using the vector candidate list.

公开(公告)号：US11924423B2

公开(公告)日：2024-03-05

申请号：US17727194

申请日：2022-04-22

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/119 ,  H04N19/137 ,  H04N19/176 ,  H04N19/52

CPC classification number: H04N19/119 ,  H04N19/137 ,  H04N19/176 ,  H04N19/52

Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.

公开(公告)号：US11908492B2

公开(公告)日：2024-02-20

申请号：US17556241

申请日：2021-12-20

Applicant: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA

Inventor： Hiroshi Yahata ,  Tadamasa Toma ,  Tomoki Ogawa

IPC: H04N19/44 ,  H04N19/46 ,  G11B27/28 ,  G11B20/10 ,  G11B27/10 ,  G11B27/32 ,  H04N5/84 ,  H04N5/85 ,  H04N7/015 ,  H04N9/804 ,  H04N9/82 ,  H04N9/87 ,  G11B27/00

CPC classification number: G11B27/28 ,  G11B20/10 ,  G11B27/105 ,  G11B27/329 ,  H04N5/84 ,  H04N5/85 ,  H04N7/015 ,  H04N9/8042 ,  H04N9/8205 ,  H04N9/8233 ,  G11B2220/2541 ,  G11B2220/2562

Abstract: A decoding method of a video stream, which is encoded video information. The video stream includes a base video stream, and an enhanced video stream, which is a video stream to enhance luminance of the base video stream, and a describer that contains the combination information of the base video stream and the enhanced video stream. The decoding method includes acquiring the describer, and identifying the combination of the base video steam and the enhanced video stream. The decoding method also includes generating base video information by decoding the base video stream, generating enhanced video information by decoding the enhanced video stream, generating decoded video information based on the base video stream and the enhanced video stream, and outputting the decoded video information.

公开(公告)号：US11895299B2

公开(公告)日：2024-02-06

申请号：US16909356

申请日：2020-06-23

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Masato Ohkawa ,  Hideo Saitou ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/12 ,  H04N19/124 ,  H04N19/18 ,  H04N19/625 ,  H04N19/61

CPC classification number: H04N19/12 ,  H04N19/124 ,  H04N19/18 ,  H04N19/625 ,  H04N19/619

Abstract: An encoder that encodes a current block in a picture includes circuitry and memory. Using the memory, the circuitry: performs a first transform on a residual signal of the current block using a first transform basis to generate first transform coefficients; and performs a second transform on the first transform coefficients using a second transform basis to generate second transform coefficients and quantizes the second transform coefficients, when the first transform basis is the same as a predetermined transform basis; and quantizes the first transform coefficients without performing the second transform, when the first transform basis is different from the predetermined transform basis.

公开(公告)号：US11876991B2

公开(公告)日：2024-01-16

申请号：US17094206

申请日：2020-11-10

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/44 ,  H04N19/137 ,  H04N19/176 ,  H04N19/182

CPC classification number: H04N19/44 ,  H04N19/137 ,  H04N19/176 ,  H04N19/182

Abstract: An image decoder includes circuitry and a memory, wherein the circuitry, in operation, calculates first values of a first partition in a current block, using a first motion vector for the first partition; calculates second values of a second partition in the current block, using a second motion vector for the second partition; calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector; calculates fourth values of the set of pixels, using the second motion vector; and weights the third values and the fourth values. A number of pixels in a row in the set of pixels is two or more, and two or more weights applied to the third values increase along the row.

公开(公告)号：US11871016B2

公开(公告)日：2024-01-09

申请号：US18090621

申请日：2022-12-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takahiro Nishi ,  Tadamasa Toma ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/31 ,  H04N19/117 ,  H04N19/172

CPC classification number: H04N19/31 ,  H04N19/117 ,  H04N19/172

Abstract: An encoder which encodes a video including a plurality of pictures includes circuitry and memory. Using the memory, the circuitry performs: encoding a first picture among the plurality of pictures; and performing (i) a first operation for encoding a parameter set for a second picture which follows the first picture in coding order among the plurality of pictures after encoding the first picture, and encoding the second picture after encoding the parameter set, or (ii) a second operation for encoding the second picture without encoding the parameter set after encoding the first picture. The circuitry performs the first operation when the second picture is a determined picture, in the performing of the first operation or the second operation.

公开(公告)号：US11863785B2

公开(公告)日：2024-01-02

申请号：US17955330

申请日：2022-09-28

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Han Boon Teo ,  Kiyofumi Abe ,  Tadamasa Toma ,  Takahiro Nishi

IPC: H04N19/00 ,  H04N19/52 ,  H04N19/12 ,  H04N19/174 ,  H04N19/182

CPC classification number: H04N19/52 ,  H04N19/12 ,  H04N19/174 ,  H04N19/182

Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: corrects a base motion vector using a correction value for correcting the base motion vector in a predetermined direction; and encodes a current partition to be encoded in an image of a video, using the base motion vector corrected. The correction value is specified by a first parameter and a second parameter, the first parameter indicating a table to be selected from among a plurality of tables each including values, the second parameter indicating one of the values included in the table to be selected indicated by the first parameter. In each of the plurality of tables, a smaller value among the values is assigned a smaller index. Each of the plurality of tables includes a different minimum value among the values.

公开(公告)号：US11863743B2

公开(公告)日：2024-01-02

申请号：US18150659

申请日：2023-01-05

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi Kanoh ,  Takahiro Nishi ,  Tadamasa Toma ,  Kiyofumi Abe

IPC: H04N19/117 ,  H04N19/146 ,  H04N19/176

CPC classification number: H04N19/117 ,  H04N19/146 ,  H04N19/176

Abstract: A decoder comprises circuitry and memory. The circuitry, using the memory, in operation, determines a number of first pixels and a number of second pixels used in a deblocking filter process, wherein the first pixels are located at an upper side of a block boundary and the second pixels are located at a lower side of the block boundary, and performs the deblocking filter process on the block boundary. The number of the first pixels and the number of the second pixels are selected from among candidates, wherein the candidates include at least 4 and M larger than 4. Response to a location of the block boundary being a predetermined location, the number of the first pixels used in the deblocking filter process is limited to be 4.

公开(公告)号：US11843799B2

公开(公告)日：2023-12-12

申请号：US17388478

申请日：2021-07-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/513 ,  H04N19/86

CPC classification number: H04N19/521 ,  H04N19/86

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: derives a motion vector of a current block by referring to at least one reference picture different from a picture to which the current block belongs; performs a mode for estimating, for each sub-block unit of sub-blocks obtained by splitting the current block, a surrounding region of the motion vector to correct the motion vector; determines whether to apply deblocking filtering to each of boundaries between neighboring ones of the sub-blocks; and applies the deblocking filtering to the boundary, based on a result of the determination.

公开(公告)号：US11825127B2

公开(公告)日：2023-11-21

申请号：US17863123

申请日：2022-07-12

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Hai Wei Sun ,  Han Boon Teo ,  Jing Ya Li ,  Che-Wei Kuo ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/82 ,  H04N19/119 ,  H04N19/176 ,  H04N19/593

CPC classification number: H04N19/82 ,  H04N19/119 ,  H04N19/176 ,  H04N19/593

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry determines whether to split a current luma virtual pipeline decoding unit (VPDU) into smaller blocks. When it is determined not to split the current luma VPDU into smaller blocks, the circuitry predicts a block of chroma samples without using luma samples. When it is determined to split the luma VPDU into smaller blocks, the circuitry predicts the block of chroma samples using luma samples. The circuitry encodes the block using the predicted chroma samples.